UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 163

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UPD78F1146AGB-GAH-AX

Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Subsystem clock (f
(when XT1 oscillation
(when X1 oscillation
Internal high-speed
oscillation clock (f
Internal reset signal
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
Notes 1.
<2> When the power supply voltage exceeds 1.59 V (TYP.), the reset is released and the internal high-speed
<3> When the power supply voltage rises with a slope of 0.5 V/ms (MIN.), the CPU starts operation on the
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 5.6.1 Example of controlling high-
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
system clock (f
Power supply
voltage (V
High-speed
CPU clock
oscillator automatically starts oscillation.
internal high-speed oscillation clock after the reset is released and after the stabilization times for the voltage
of the power supply and regulator have elapsed, and then reset processing is performed.
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
switching via software (see (3) in 5.6.1 Example of controlling high-speed system clock and (2) in 5.6.3
Example of controlling subsystem clock).
selected)
selected)
2.
DD
SUB
0 V
MX
IH
Figure 5-13. Clock Generator Operation When Power Supply Voltage Is Turned On
The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the
internal high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the
oscillation stabilization time counter status register (OSTC). If the CPU operates on the high-speed
system clock (X1 oscillation), set the oscillation stabilization time when releasing STOP mode using the
oscillation stabilization time select register (OSTS).
)
)
)
)
(When LVI Default Start Function Stopped Is Set (Option Byte: LVIOFF = 1))
1.59 V
(TYP.)
<1>
voltage stabilization
<2>
0.5 V/ms
(MIN.)
Note 1
Waiting for
1.92 to 6.17 ms
1.8 V
Starting X1 oscillation
is set by software.
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17854EJ9V0UD
Starting XT1 oscillation
is set by software.
<3>
Internal high-speed oscillation clock
<4>
Reset processing
oscillation stabilization time:
<4>
2
8
/f
X
X1 clock
to 2
18
/f
X
Note 2
<5>
High-speed system clock
Switched by
software
<5>
Subsystem clock
161

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