UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 164

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

162
Subsystem clock (f
(when XT1 oscillation
Internal reset signal
Internal high-speed
(when X1 oscillation
oscillation clock (f
<1> When the power is turned on, an internal reset signal is generated by the low-voltage detector (LVI).
Cautions 1. If the voltage rises with a slope of less than 0.5 V/ms (MIN.) from power application until the
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via
<2> When the power supply voltage exceeds 2.07 V (TYP.), the reset is released and the internal high-speed
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 5.6.1 Example of controlling high-
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
system clock (f
Power supply
voltage (V
High-speed
CPU clock
oscillator automatically starts oscillation.
speed oscillation clock.
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
switching via software (see (3) in 5.6.1 Example of controlling high-speed system clock and (2) in 5.6.3
Example of controlling subsystem clock).
selected)
selected)
software settings. The internal high-speed oscillation clock and high-speed system clock can be stopped
by executing the STOP instruction (see (4) in 5.6.1 Example of controlling high-speed system clock,
(3) in 5.6.2 Example of controlling internal high-speed oscillation clock, and (3) in 5.6.3 Example
of controlling subsystem clock).
DD
SUB
0 V
MX
2. It is not necessary to wait for the oscillation stabilization time when an external clock input
IH
Figure 5-14. Clock Generator Operation When Power Supply Voltage Is Turned On
)
)
)
)
voltage reaches 1.8 V, input a low level to the RESET pin from power application until the
voltage reaches 1.8 V, or set the LVI default start function stopped by using the option byte
(LVIOFF = 0) (see Figure 5-14). By doing so, the CPU operates with the same timing as <2>
and thereafter in Figure 5-13 after reset release by the RESET pin.
from the EXCLK pin is used.
(When LVI Default Start Function Enabled Is Set (Option Byte: LVIOFF = 0))
2.07 V (TYP.)
CHAPTER 5 CLOCK GENERATOR
Note 1
Starting X1 oscillation
is set by software.
User’s Manual U17854EJ9V0UD
<1>
<2>
Starting XT1 oscillation
is set by software.
<4>
<3>
Reset processing
oscillation stabilization time:
(43 to 160 s)
<4>
Internal high-speed
oscillation clock
2
8
/f
X
X1 clock
to 2
μ
18
/f
X
Note 2
<5>
High-speed system clock
Switched by
software
<5>
Subsystem clock