UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 166

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
pins.
164
(4) When stopping high-speed system clock
(1) Example of setting procedure when oscillating the X1 clock
The following two types of high-speed system clocks are available.
• X1 clock:
• External main system clock: External clock is input to the EXCLK pin.
When the high-speed system clock is not used, the X1/P121 and X2/EXCLK/P122 pins can be used as input port
Caution The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU/peripheral hardware clock
<1> Setting P121/X1 and P122/X2/EXCLK pins and setting oscillation frequency (CMC register)
<2> Controlling oscillation of X1 clock (CSC register)
<3> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory
• 2 MHz ≤ f
• 10 MHz < f
Remarks 1. f
If MSTOP is cleared to 0, the X1 oscillator starts oscillating.
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation
clock.
EXCLK
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
0
0
manipulation instruction.
Therefore, it is necessary to also set the value of the OSCSELS bit at the same time. For
OSCSELS bit, see 5.6.3 Example of controlling subsystem clock.
be used (see CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) and
CHAPTER 28 ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)).
2. For setting of the P123/XT1 and P124/XT2 pins, see 5.6.3
X
X
≤ 10 MHz
OSCSEL
OSCSEL
subsystem clock.
X
≤ 20 MHz
: X1 clock oscillation frequency
1
1
Crystal/ceramic resonator is connected to the X1 and X2 pins.
0
0
0
0
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17854EJ9V0UD
OSCSELS
OSCSELS
0/1
0/1
0
0
0
0
0
0
0
0
0
0
0
0
Example of controlling
AMPH
AMPH
0
1