UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 203

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: F01B4H, F01B5H
Address: FFF3EH
(7) Timer channel stop register 0 (TT0)
(8) Timer input select register 0 (TIS0)
Symbol
Symbol
TIS0
TT0
TT0 is a trigger register that is used to clear a timer counter (TCR0n) and start the counting operation of each
channel.
When a bit (TT0n) of this register is set to 1, the corresponding bit (TE0n) of timer channel enable status
register 0 (TE0) is cleared to 0. TT0n is a trigger bit and cleared to 0 immediately when TE0n = 0.
TT0 can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of TT0 can be set with a 1-bit or 8-bit memory manipulation instruction with TT0L.
Reset signal generation clears this register to 0000H.
Caution Be sure to clear bits 15 to 8 to “0”.
Remarks 1. When the TT0 register is read, 0 is always read.
TIS0 is used to select whether a signal input to the timer input pin (TI0n) or the subsystem clock divided by four
(f
TIS0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Caution Since the 78K0R/KE3 does not have the timer input pin on channel 7, normally the timer
SUB
/4) is valid for each channel.
TT0n
15
0
1
0
TIS0n
TIS07
2. n = 0 to 7
input on channel 7 cannot be used. When the LIN-bus communication function is used,
select the input signal of the RxD3 pin by setting ISC1 (bit 1 of the input switch control
register (ISC)) to 1 and setting TIS07 to 0.
0
1
7
After reset: 00H
No trigger operation
Operation is stopped (stop trigger is generated).
14
0
Input signal of timer input pin (TI0n)
Subsystem clock divided by 4 (f
Figure 6-15. Format of Timer Channel Stop Register 0 (TT0)
Figure 6-16. Format of Timer Input Select Register 0 (TIS0)
After reset: 0000H
13
0
TIS06
6
12
0
R/W
11
0
CHAPTER 6 TIMER ARRAY UNIT
TIS05
Selection of timer input/subsystem clock used with channel n
5
User’s Manual U17854EJ9V0UD
R/W
10
0
Operation stop trigger of channel n
9
0
SUB
TIS04
/4)
4
8
0
TT07 TT06 TT05 TT04 TT03 TT02 TT01 TT00
7
TIS03
3
6
5
TIS02
2
4
3
TIS01
1
2
1
TIS00
0
201
0