UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 246

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UPD78F1146AGB-GAH-AX

Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
244
TMR0m
TOM0
TOE0
TOL0
Remark
TO0
(a) Timer mode register 0m (TMR0m)
(b) Timer output register 0 (TO0)
(c) Timer output enable register 0 (TOE0)
(d) Timer output level register 0 (TOL0)
(e) Timer output mode register 0 (TOM0)
Figure 6-58. Example of Set Contents of Registers When PWM Function (Slave Channel) Is Used
TOM0m
TOE0m
CKS0m
TOL0m
Bit m
TO0m
Bit m
Bit m
Bit m
1/0
1/0
1/0
1/0
15
1
n = 0, 2, 4
m = n + 1
Operation clock selection
14
0: Selects CK00 as operation clock of channel m.
1: Selects CK01 as operation clock of channel m.
0
* Make the same setting as master channel.
0: Outputs 0 from TO0m.
1: Outputs 1 from TO0m.
0: Stops the TO0m output operation by counting operation.
1: Enables the TO0m output operation by counting operation.
0: Positive logic output (active-high)
1: Inverted output (active-low)
1: Sets the combination-operation mode.
13
0
CCS0m
12
0
Count clock selection
TER0
MAS
11
0: Selects operation clock.
0
m
CHAPTER 6 TIMER ARRAY UNIT
Slave/master selection
STS0m2
10
0: Channel 0 is set as slave channel.
1
User’s Manual U17854EJ9V0UD
STS0m1
9
0
Start trigger selection
STS0m0
100B: Selects INTTM0n of master channel.
8
0
CIS0m1
0
7
CIS0m0
6
0
Selection of TI0m pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel m
100B: One-count mode
0
5
4
0
Start trigger during operation
MD0m3
1: Trigger input is valid.
3
1
MD0m2
2
0
MD0m1
1
0
MD0m0
0
1

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