UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 247

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UPD78F1146AGB-GAH-AX

Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TAU
default
setting
Channel
default
setting
Remark
Sets slave channel.
Sets the TAU0EN bit of the PER0 register to 1.
Sets the TPS0 register.
Sets the TMR0n and TMR0m registers of two channels
to be used (determines operation mode of channels).
An interval (period) value is set to the TDR0n register of
the master channel, and a duty factor is set to the
TDR0m register of the slave channel.
n = 0, 2, 4
m = n + 1
Determines clock frequencies of CK00 and CK01.
The TOM0m bit of the TOM0 register is set to 1
(combination-operation mode).
Sets the TOL0m bit.
Sets the TO0m bit and determines default level of the
TO0m output.
Sets TOE0m to 1 and enables operation of TO0m.
Clears the port register and port mode register to 0.
Figure 6-59. Operation Procedure When PWM Function Is Used (1/2)
Software Operation
CHAPTER 6 TIMER ARRAY UNIT
User’s Manual U17854EJ9V0UD
Power-off status
Power-on status. Each channel stops operating.
Channel stops operating.
(Clock is supplied and some power is consumed.)
The TO0m pin goes into Hi-Z output state.
The TO0m default setting level is output when the port
mode register is in output mode and the port register is 0.
TO0m does not change because channel stops operating.
The TO0m pin outputs the TO0m set level.
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
Hardware Status
245

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