UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 451

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.6.6
is described in Figures 13-91 and 13-92.
Remark
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Sets STmn bit to 1.
Synchronization with other party of
communication
Sets SSmn bit to 1.
The procedure for processing errors that occurred during UART (UART0, UART1, UART2, UART3) communication
communication
Procedure for processing errors that occurred during UART (UART0, UART1, UART2, UART3)
Software Manipulation
Software Manipulation
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), mn = 00 to 03, 12 13
Figure 11-91. Processing Procedure in Case of Parity Error or Overrun Error
Figure 11-92. Processing Procedure in Case of Framing Error
CHAPTER 11 SERIAL ARRAY UNIT
The BFF0 = 0, and channel n is
enabled to receive data.
Error flag is cleared.
The BFF = 0, and channel n is enabled
to receive data.
Error flag is cleared.
The SEmn = 0, and channel n stops
operating.
The SEmn = 1, and channel n is
enabled to operate.
User’s Manual U17854EJ9V0UD
Hardware Status
Hardware Status
This is to prevent an overrun error if the
next reception is completed during error
processing.
Error type is identified and the read
value is used to clear error flag.
Only error generated at the point of
reading can be cleared, by writing the
value read from the SSRmn register to
the SIRmn register without modification.
This is to prevent an overrun error if the
next reception is completed during error
processing.
Error type is identified and the read
value is used to clear error flag.
Only error generated at the point of
reading can be cleared, by writing the
value read from the SSRmn register to
the SIRmn register without modification.
Synchronization with the other party of
communication is re-established and
communication is resumed because it is
considered that a framing error has
occurred because the start bit has been
shifted.
Remark
Remark
449