UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 469

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
11.7.6 Procedure for processing errors that occurred during simplified I
Figures 11-105 and 11-106.
Reads SDR02 register.
Reads SSR02 register.
Writes SIR02 register.
Reads SDR02 register.
Reads SSR02 register.
Writes SIR02 register.
Sets ST02 bit to 1.
Creates stop condition.
Creates start condition.
Sets SS02 bit to 1.
The procedure for processing errors that occurred during simplified I
Figure 11-106. Processing Procedure in Case of Parity Error (ACK error) in Simplified I
Software Manipulation
Software Manipulation
Figure 11-105. Processing Procedure in Case of Parity Error or Overrun Error
CHAPTER 11 SERIAL ARRAY UNIT
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
SE02 = 0, and channel n stops
operation.
SE02 = 1, and channel n is enabled to
operate.
User’s Manual U17854EJ9V0UD
Hardware Status
Hardware Status
2
C (IIC10) communication is described in
2
C (IIC10) communication
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Only error generated at the point of
reading can be cleared, by writing
the value read from the SSR02
register to the SIR02 register without
modification.
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Only error generated at the point of
reading can be cleared, by writing
the value read from the SSR02
register to the SIR02 register without
modification.
Slave is not ready for reception
because ACK is not returned.
Therefore, a stop condition is
created, the bus is released, and
communication is started again from
the start condition. Or, a restart
condition is generated and
transmission can be redone from
address transmission.
Remark
Remark
2
C Mode
467