UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 472

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note1
SE
02
0
1
0
1
0
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
470
Remark X: Don’t care
MD
022
0
0
1
0
0
1
MD
021
0
1
0
0
1
0
2. When channel 3 of unit 0 is set to UART1 reception, this pin becomes an RxD1 function pin (refer to Table
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 11.3 (12) Serial output
5. When using UART1 transmission and reception in a pair, set channel 3 of unit 0 to UART1 reception (refer
6. Set the CKO02 bit to 1 before a start condition is generated. Clear the SO02 bit from 1 to 0 when the start
7. Set the CKO02 bit to 1 before a stop condition is generated. Clear the SO02 bit from 0 to 1 when the stop
SOE
11-8). In this case, operation stop mode or UART1 transmission must be selected for channel 2 of unit 0.
register m (SOm).
to Table 11-8).
condition is generated.
condition is generated.
02
0
0
1
1
0
1
1
1
0
1
1
1
0
Note4
Note4
Note4
Note4
Note4
Note6
Note4
Note4
Note4
Note7
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
SO
02
1
1
1
CKO
Note4
Note4
Note4
Note6
Note4
Note4
Note4
Note7
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
02
1
1
1
1
1
TXE
02
0
0
1
1
0
1
1
1
0
1
0
1
1
0
0
1
0
Table 11-7. Relationship between register settings and pins
(Channel 2 of unit 0: CSI10, UART1 transmission, IIC10)
RXE
02
0
1
0
1
1
0
1
0
0
0
1
0
0
1
0
0
1
Note3
Note3
PM
04
1
1
1
0
0
0
0
0
0
0
0
×
×
Note3
Note3
P04 PM03
CHAPTER 11 SERIAL ARRAY UNIT
1
1
1
1
1
1
1
1
×
×
×
×
×
User’s Manual U17854EJ9V0UD
Note3
Note3
Note3
Note3
Note2
×
1
×
1
1
×
1
×
0
0
0
0
0
Note3
Note3
Note3
Note3
Note2
P03
×
×
×
×
×
×
×
×
1
1
1
1
1
PM02 P02
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
×
×
0
0
×
0
0
0
×
×
×
×
×
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
×
×
1
1
×
1
1
1
×
×
×
×
×
transmission /reception
transmission /reception
transmission
IIC10 address field
Operation mode
Operation stop
start condition
Master CSI10
Master CSI10
stop condition
Slave CSI10
Slave CSI10
transmission
transmission
transmission
Master CSI10
transmission
Slave CSI10
IIC10 data
IIC10 data
reception
reception
reception
UART1
mode
IIC10
IIC10
Note5
SCL10/P04
(output)
(output)
(output)
SCK10/
SCK10
SCK10
SCK10
SCK10
SCK10
SCK10
SCL10
SCL10
SCL10
SCL10
SCL10
(input)
(input)
(input)
P04
P04
Pin Function
SI10/SDA10/
P03/RxD1
P03/RxD1
RxD1/P03
SDA10
SDA10
SDA10
SDA10
SDA10
SI10
SI10
SI10
SI10
Note2
P03
P03
P03
P03
TxD1/P02
SO10/
SO10
SO10
SO10
SO10
TxD1
P02
P02
P02
P02
P02
P02
P02
P02