UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 513

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) Master operation in single-master system
Note Release (SCL0 and SDA0 pins = high level) the I
Remark
product that is communicating. If EEPROM is outputting a low level to the SDA0 pin, for example, set the
SCL0 pin in the output port mode, and output a clock pulse from the output port until the SDA0 pin is
constantly at high level.
Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
No
No
Figure 12-24. Master Operation in Single-Master System
ACKE0 = WTIM0 = SPIE0 = 1
Setting STCEN, IICRSV = 0
Initializing I
IICC0 ← 1XX111XXB
IICC0 ← 0XX111XXB
Interrupt occurs?
interrupt occurs?
interrupt occurs?
End of transfer?
IICCL0 ← XXH
SVA0 ← XXH
STCEN = 1?
ACKD0 = 1?
ACKD0 = 1?
IICX0 ← 0XH
IICF0 ← 0XH
Writing IIC0
Writing IIC0
Setting port
Setting port
TRC0 = 1?
IICE0 = 1
SPT0 = 1
STT0 = 1
INTIIC0
INTIIC0
INTIIC0
Restart?
START
2
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
C bus
CHAPTER 12 SERIAL INTERFACE IIC0
Note
Waits for detection of the stop condition.
Yes
No
No
No
No
No
No
User’s Manual U17854EJ9V0UD
Prepares for starting communication
(generates a stop condition).
Sets the port from input mode to output mode and enables the output of the I
(see 12.3 (7) Port mode register 6 (PM6)).
Starts transmission.
Waits for data transmission.
Prepares for starting communication
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Sets the port used alternatively as the pin to be used.
First, set the port to input mode and the output latch to 0 (see 12.3 (7) Port mode register 6 (PM6)).
Selects a transfer clock.
Sets a local address.
Sets a start condition.
SPT0 = 1
END
2
C bus in conformance with the specifications of the
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
End of transfer?
Reading IIC0
WREL0 = 1
ACKE0 = 0
ACKE0 = 1
WTIM0 = 0
INTIIC0
INTIIC0
Yes
Yes
Yes
No
No
No
Waits for data
reception.
Waits for detection
of acknowledge.
Starts reception.
2
C bus
511