UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 606

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark f
604
Item
System clock
CPU
Flash memory
RAM
Port (latch)
Timer array unit (TAU)
Real-time counter (RTC)
Watchdog timer
Clock output/buzzer output
A/D converter
Serial array unit (SAU)
Serial interface (IIC0)
Multiplier
DMA controller
Power-on-clear function
Low-voltage detection function
External interrupt
Key interrupt function
Main system clock
Subsystem clock
f
IL
f
f
f
f
IH
X
EX
XT
IL
HALT Mode Setting
:
:
:
: XT1 clock
: External main system clock
Internal high-speed oscillation clock
X1 clock
Internal low-speed oscillation clock
f
f
f
f
IH
X
EX
XT
Clock supply to the CPU is stopped
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Status before HALT mode was set is retained
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Oscillates
• WTON = 1 and WDSTBYON = 0: Stops
Operation stopped
Operable in low-current consumption mode
Operation stopped. However, status before HALT mode was set is retained at voltage higher
than POC detection voltage.
Status before HALT mode was set is retained
Operable
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Operates
• WTON = 1 and WDSTBYON = 0: Stops
Operable
Operation stopped
Operable
Table 17-1. Operating Statuses in HALT Mode (1/2)
When CPU Is Operating on
Oscillation Clock (f
Internal High-Speed
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 17 STANDBY FUNCTION
User’s Manual U17854EJ9V0UD
IH
)
Status before HALT mode was set is retained
Operation continues (cannot
be stopped)
Cannot operate
When CPU Is Operating on
X1 Clock (f
X
)
Cannot operate
Operation continues (cannot
be stopped)
External Main System Clock
When CPU Is Operating on
(f
EX
)