UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 832

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UPD78F1146AGB-GAH-AX

Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
830
Clock
generator
X1/XT1
oscillator
Clock
generator
operation
when
power
supply
voltage is
turned on
Controlling
high-speed
system
clock
Function
HIOTRM:
Internal-high-
speed oscillator
trimming register
When LVI
default start
function stopped
is set (option
byte: LVIOFF =
1)
When LVI
default start
function enabled
is set (option
byte: LVIOFF =
0)
X1/P121,
X2/EXCLK/P122
X1 clock
External main
system clock
Details of
Function
Note that the XT1 oscillator is designed as a low-amplitude circuit for reducing power
consumption.
The
increasing/decreasing the HIOTRM value to a value larger/smaller than a certain
value.
increasing/decreasing the HIOTRM value does not occur.
When using the X1 oscillator and XT1 oscillator, wire as follows in the area enclosed
by the broken lines in the Figures 5-10 and 5-11 to avoid an adverse effect from
wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines. Do not route the wiring near a
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not fetch signals from the oscillator.
When X2 and XT1 are wired in parallel, the crosstalk noise of X2 may increase with
XT1, resulting in malfunctioning.
If the voltage rises with a slope of less than 0.5 V/ms (MIN.) from power application
until the voltage reaches 1.8 V, input a low level to the RESET pin from power
application until the voltage reaches 1.8 V, or set the LVI default start function
stopped by using the option byte (LVIOFF = 0) (see Figure 5-14). By doing so, the
CPU operates with the same timing as <2> and thereafter in Figure 5-13 after reset
release by the RESET pin.
It is not necessary to wait for the oscillation stabilization time when an external clock
input from the EXCLK pin is used.
A voltage oscillation stabilization time is required after the supply voltage reaches
1.59 V (TYP.). If the supply voltage rises from 1.59 V (TYP.) to 2.07 V (TYP.) within
the power supply oscillation stabilization time, the power supply oscillation
stabilization time is automatically generated before reset processing.
It is not necessary to wait for the oscillation stabilization time when an external clock
input from the EXCLK pin is used.
The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset
release.
The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction.
OSCSELS bit at the same time. For OSCSELS bit, see 5.6.3 Example of controlling
subsystem clock.
Set the X1 clock after the supply voltage has reached the operable voltage of the
clock to be used (see CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD
PRODUCTS) and CHAPTER 28 ELECTRICAL SPECIFICATIONS ((A) GRADE
PRODUCTS)).
The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction.
OSCSELS bits at the same time.
controlling subsystem clock.
signal line through which a high fluctuating current flows.
Do not ground the capacitor to a ground pattern through which a high current flows.
internal
APPENDIX B LIST OF CAUTIONS
A
User’s Manual U17854EJ9V0UD
reversal,
high-speed
such
Therefore, it is necessary to also set the value of the
Therefore, it is necessary to also set the value of the
oscillation
as
the
Cautions
For OSCSELS bits, see 5.6.3 Example of
frequency
frequency
becomes
becoming
faster/slower
slower/faster
SS
by
by
.
p.155
p.157
p.158
p.162
p.162
p.163
p.163
p.164
p.164
p.164
p.165
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