UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 834

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

832
Timer
array unit
Function
Channel output
(TO0n pin)
operation
TPS0: Timer
clock select
register 0
TMR0n: Timer
mode register 0n
TS0: Timer
channel start
register 0
TT0: Timer
channel stop
register 0
TIS0: Timer
Input Select
Register 0
TOE0: Timer
output enable
register 0
TO0: Timer
output register 0
TOL0: Timer
output level
register 0
TOM0: Timer
output mode
register 0
ISC: Input switch
control register
NFFN1:Noise
Filter Enable
Register 1
Details of
Function
Be sure to clear bits 15 to 8 to “0”.
Be sure to clear bits 14, 13, 5, and 4 to “0”.
Be sure to clear bits 15 to 8 to “0”.
In the first cycle operation of count clock after writing TS0n, an error at a maximum of
one clock is generated since count start delays until count clock has been generated.
When the information on count start timing is necessary, an interrupt can be
generated at count start by setting MD0n0 = 1.
An input signal sampling error is generated since operation starts upon start trigger
detection (The error is one count clock when TI0k is used).
Be sure to clear bits 15 to 8 to “0”.
Since the 78K0R/KE3 does not have the timer input pin on channel 7, normally the
timer input on channel 7 cannot be used. When the LIN-bus communication function
is used, select the input signal of the RxD3 pin by setting ISC1 (bit 1 of the input
switch control register (ISC)) to 1 and setting TIS07 to 0.
Be sure to clear bits 15 to 7 to “0”.
Be sure to clear bits 15 to 7 to “0”.
Be sure to clear bits 15 to 7 to “0”.
Be sure to clear bits 15 to 7 to “0”.
Be sure to clear bits 7 to 2 to “0”.
Be sure to clear bits 7 to “0”.
(1) Changing values set in registers TO0, TOE0, TOL0, and TOM0 during timer
operation
Since the timer operations (operations of TCR0n and TDR0n) are independent of the
TO0n output circuit and changing the values set in TO0, TOE0, TOL0, and TOM0
does not affect the timer operation, the values can be changed during timer
operation. To output an expected waveform from the TO0n pin by timer operation,
however, set TO0, TOE0, TOL0, and TOM0 to the values stated in the register
setting example of each operation.
When the values set in TOE0, TOL0, and TOM0 (except for TO0) are changed close
to the timer interrupt(INTTM0n), the waveform output to the TO0n pin may be
different depending on whether the values are changed immediately before or
immediately after the timer interrupt (INTTM0n) signal generation timing.
APPENDIX B LIST OF CAUTIONS
User’s Manual U17854EJ9V0UD
Cautions
p.190
p.191
p.196
pp.197,
198
pp.199,
200
p.201
p.201
p.202
p.203
p.204
p.205
p.206
p.207
p.210
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