UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet
UPD78F0138HGK-9ET-A
Specifications of UPD78F0138HGK-9ET-A
Related parts for UPD78F0138HGK-9ET-A
UPD78F0138HGK-9ET-A Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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User’s Manual 78K0/KE1+ 8-Bit Single-Chip Microcontrollers PD78F0132H PD78F0133H PD78F0134H PD78F0136H PD78F0138H PD78F0138HD PD78F0132H(A) PD78F0133H(A) PD78F0134H(A) PD78F0136H(A) PD78F0138H(A) Document No. U16899EJ3V0UD00 (3rd edition) Date Published November 2006 NS CP(K) 2003 Printed in Japan PD78F0132H(A1) PD78F0133H(A1) PD78F0134H(A1) PD78F0136H(A1) PD78F0138H(A1) ...
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User’s Manual U16899EJ3V0UD ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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EEPROM is a trademark of NEC Electronics Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/ trademark of International Business Machines Corporation. HP9000 series 700 ...
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Readers This manual is intended for user engineers who wish to understand the functions of the 78K0/KE1+ and design and develop application systems and programs for these devices. The target products are as follows. 78K0/KE1+: Purpose This manual is intended ...
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To know details of the 78K/0 Series instructions: Conventions Data significance: Active low representations: Note: Caution: Remark: Numerical representations: Binary Differences Between 78K0/KE1+ and 78K0/KE1 Series Name Item Mask ROM version Flash Power supply memory Self-programming function version Option byte ...
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Documents Related to Development Tools (Software) (User’s Manuals) RA78K0 Ver. 3.80 Assembler Package CC78K0 Ver. 3.70 C Compiler SM+ System Simulator ID78K0-QB Ver. 2.81 Integrated Debugger PM plus Ver. 5.20 Documents Related to Development Tools (Hardware) (User’s Manuals) QB-78K0KX1H In-Circuit ...
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CHAPTER 1 OUTLINE ............................................................................................................................ 16 1.1 Features......................................................................................................................................... 16 1.2 Applications .................................................................................................................................. 17 1.3 Ordering Information ................................................................................................................... 18 1.4 Pin Configuration (Top View) ...................................................................................................... 21 1.5 Kx1 Series Lineup ........................................................................................................................ 23 1.5.1 78K0/Kx1, 78K0/Kx1+ product lineup................................................................................................ 23 1.5.2 V850ES/Kx1, V850ES/Kx1+ product ...
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Instruction Address Addressing ................................................................................................ 71 3.3.1 Relative addressing............................................................................................................................71 3.3.2 Immediate addressing........................................................................................................................72 3.3.3 Table indirect addressing ...................................................................................................................73 3.3.4 Register addressing ...........................................................................................................................73 3.4 Operand Address Addressing .................................................................................................... 74 3.4.1 Implied addressing .............................................................................................................................74 3.4.2 Register addressing ...........................................................................................................................75 3.4.3 Direct addressing ...............................................................................................................................76 3.4.4 ...
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Time Required to Switch Between Internal Oscillation Clock and High-Speed System Clock ............................................................................................................................................ 130 5.7 Time Required for CPU Clock Switchover............................................................................... 131 5.8 Clock Switching Flowchart and Register Setting ................................................................... 132 5.8.1 Switching from internal oscillation clock to high-speed ...
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Watch timer operation ......................................................................................................................229 9.4.2 Interval timer operation ....................................................................................................................230 9.5 Cautions for Watch Timer ......................................................................................................... 231 CHAPTER 10 WATCHDOG TIMER ..................................................................................................... 232 10.1 Functions of Watchdog Timer ................................................................................................ 232 10.2 Configuration of Watchdog Timer.......................................................................................... 234 10.3 Registers Controlling Watchdog ...
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Configuration of Serial Interface UART6 ............................................................................... 294 14.3 Registers Controlling Serial Interface UART6....................................................................... 297 14.4 Operation of Serial Interface UART6 ...................................................................................... 306 14.4.1 Operation stop mode......................................................................................................................306 14.4.2 Asynchronous serial interface (UART) mode .................................................................................307 14.4.3 Dedicated baud rate generator.......................................................................................................321 CHAPTER ...
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CHAPTER 21 CLOCK MONITOR ........................................................................................................ 399 21.1 Functions of Clock Monitor..................................................................................................... 399 21.2 Configuration of Clock Monitor .............................................................................................. 399 21.3 Registers Controlling Clock Monitor ..................................................................................... 400 21.4 Operation of Clock Monitor..................................................................................................... 401 CHAPTER 22 POWER-ON-CLEAR CIRCUIT ..................................................................................... 406 22.1 Functions ...
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Flash memory programming mode.................................................................................................448 26.7.3 Selecting communication mode......................................................................................................449 26.7.4 Communication commands ............................................................................................................450 26.8 Flash Memory Programming by Self-Writing ........................................................................ 451 26.8.1 Registers used for self-programming function ................................................................................452 26.9 Boot Swap Function................................................................................................................. 456 26.9.1 Outline of boot swap function .........................................................................................................456 ...
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C.2 Register Index (In Alphabetical Order with Respect to Register Symbol) .......................... 534 APPENDIX D LIST OF CAUTIONS..................................................................................................... 538 APPENDIX E REVISION HISTORY ..................................................................................................... 563 E.1 Major Revisions in This Edition ............................................................................................... 563 E.2 Revision History up to Previous Edition.................................................................................. ...
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Features Minimum instruction execution time can be changed from high speed (0.125 MHz operation with high- speed system clock) to ultra low-speed (122 s: @ 32.768 kHz operation with subsystem clock) General-purpose register: 8 bits ROM, ...
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A/D converter: 8 channels <R> Supply voltage: • Standard products and (A) grade products 2.5 to 5.5 V (with internal oscillation clock or subsystem clock • (A1) grade products 2.7 to 5.5 ...
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Ordering Information <R> Flash memory version Part Number PD78F0132HGB-8EU PD78F0132HGB-8EU-A PD78F0132HGC-8BS PD78F0132HGC-8ES-A PD78F0132HGK-9ET PD78F0132HGK-9ET-A PD78F0133HGB-8EU PD78F0133HGB-8EU-A PD78F0133HGC-8BS PD78F0133HGC-8ES-A PD78F0133HGK-9ET PD78F0133HGK-9ET-A PD78F0134HGB-8EU PD78F0134HGB-8EU-A PD78F0134HGC-8BS PD78F0134HGC-8ES-A PD78F0134HGK-9ET PD78F0134HGK-9ET-A PD78F0136HGB-8EU PD78F0136HGB-8EU-A PD78F0136HGC-8BS PD78F0136HGC-8ES-A PD78F0136HGK-9ET PD78F0136HGK-9ET-A PD78F0138HGB-8EU PD78F0138HGB-8EU-A PD78F0138HGC-8BS PD78F0138HGC-8ES-A PD78F0138HGK-9ET PD78F0138HGK-9ET-A Note ...
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Part Number PD78F0132HGB(A)-8EU 64-pin plastic LQFP (10 PD78F0132HGB(A)-8EU-A 64-pin plastic LQFP (10 PD78F0132HGC(A)-8BS 64-pin plastic LQFP (14 PD78F0132HGC(A)-8ES-A 64-pin plastic LQFP (14 PD78F0132HGK(A)-9ET 64-pin plastic TQFP (12 PD78F0132HGK(A)-9ET-A 64-pin plastic TQFP (12 PD78F0133HGB(A)-8EU 64-pin plastic LQFP (10 PD78F0133HGB(A)-8EU-A 64-pin plastic ...
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Part Number PD78F0132HGB(A1)-8EU 64-pin plastic LQFP (10 PD78F0132HGB(A1)-8EU-A 64-pin plastic LQFP (10 PD78F0132HGC(A1)-8BS 64-pin plastic LQFP (14 PD78F0132HGC(A1)-8ES-A 64-pin plastic LQFP (14 PD78F0132HGK(A1)-9ET 64-pin plastic TQFP (12 PD78F0132HGK(A1)-9ET-A 64-pin plastic TQFP (12 PD78F0133HGB(A1)-8EU 64-pin plastic LQFP (10 PD78F0133HGB(A1)-8EU-A 64-pin plastic ...
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Pin Configuration (Top View) 64-pin plastic LQFP (10 10) 64-pin plastic LQFP (14 14) 64-pin plastic TQFP (12 12) 64-pin plastic LQFP (12 12 ...
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Pin Identification ANI0 to ANI7: Analog input AV : Analog reference voltage REF AV : Analog ground SS BUZ: Buzzer output EV : Power supply for port Ground for port SS FLMD0, FLMD1: Flash programming mode INTP0 ...
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Kx1 Series Lineup 1.5.1 78K0/Kx1, 78K0/Kx1+ product lineup 30-pin SSOP (7.62 mm 0.65 mm pitch) 78K0/KB1 PD78F0103 Two-power-supply flash memory: 24 KB, RAM: 768 B 44-pin LQFP ( 0.8 mm pitch) 78K0/KC1 PD78F0114 Two-power-supply flash memory: 32 ...
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The list of functions in the 78K0/Kx1 is shown below. Part Number 78K0/KB1 Item Number of pins Internal Mask ROM 8 memory (KB) Flash memory RAM 0.5 Power supply voltage Minimum instruction execution time 0.166 s (when 12 MHz, V ...
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The list of functions in the 78K0/Kx1+ is shown below. Part Number 78K0/KB1+ Item Number of pins Internal Flash memory 8 memory RAM 0.5 (KB) Power supply voltage Minimum instruction execution time Clock Crystal/ceramic RC Subclock Internal oscillator Ports CMOS ...
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V850ES/Kx1, V850ES/Kx1+ product lineup • 64-pin plastic LQFP (10 10 mm, 0.5 mm pitch) • 64-pin plastic TQFP (12 12 mm, 0.65 mm pitch) V850ES/KE1 PD70F3207HY PD70F3207H Single-power flash: 128 KB, RAM • 80-pin plastic TQFP (12 ...
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The list of functions in the V850ES/Kx1 is shown below. Product Name V850ES/KE1 Number of pins Internal Mask ROM 128 memory (KB) Flash memory RAM Supply voltage Minimum instruction execution time Clock X1 input Subclock Internal oscillator Port CMOS input ...
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The list of functions in the V850ES/Kx1+ is shown below. Product Name Number of pins Internal Mask ROM 128 memory Flash memory (KB) RAM Supply voltage Minimum instruction execution time Clock X1 input Subclock Internal oscillator Port CMOS input CMOS ...
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Block Diagram TO00/TI010/P01 16-bit timer/ event counter 00 TI000/P00 Note 1 Note 1 TO01 /TI011 /P06 16-bit timer/ event counter 01 Note 1 TI001 /P05 TOH0/P15 8-bit timer H0 TOH1/P16 8-bit timer H1 8-bit timer/ TI50/TO50/P17 event counter 50 ...
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Outline of Functions Item Internal Flash memory memory (self-programming Note 1 (bytes) supported) Note 1 High-speed RAM Note 1 Expansion RAM Memory space <R> High-speed system clock (oscillation frequency) Standard products and (A) grade products (A1) grade products Internal ...
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Item Timers Timer outputs Clock output Buzzer output A/D converter Serial interface Multiplier/divider Vectored interrupt Internal sources External Key interrupt Reset ROM correction On-chip debug function <R> Supply voltage <R> Operating ambient temperature Package Notes 1. Select either of the ...
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An outline of the timer is shown below. Operation Interval timer 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel mode External event counter 1 channel 1 channel 1 channel 1 channel Watchdog timer Function Timer output ...
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Pin Function List There are three types of pin I/O buffer power supplies: AV power supplies and the pins is shown below. Power Supply AV REF (1) Port pins (1/2) Pin Name I/O P00 I/O ...
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Port pins (2/2) Pin Name I/O P40 to P43 I/O Port 4. 4-bit I/O port. Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P50 to P53 I/O ...
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Non-port pins (1/2) Pin Name I/O INTP0 Input External interrupt request input for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be INTP1 to INTP3 specified INTP4 INTP5 INTP6 INTP7 SI10 Input ...
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Non-port pins (2/2) Pin Name I/O AV Input A/D converter reference voltage input and positive power REF supply for port 2 AV A/D converter ground potential. Make the same potential KR0 to KR7 ...
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Description of Pin Functions 2.2.1 P00 to P06 (port 0) P00 to P06 function as a 7-bit I/O port. These pins also function as timer I/O, serial interface data I/O, clock I/O, and chip select input. The following operation ...
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P10 to P17 (port 1) P10 to P17 function as an 8-bit I/O port. These pins also function as pins for external interrupt request input, serial interface data I/O, clock I/O, timer I/O, and flash memory programming mode setting. ...
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P20 to P27 (port 2) P20 to P27 function as an 8-bit input-only port. These pins also function as pins for A/D converter analog input. The following operation modes can be specified in 1-bit units. (1) Port mode P20 ...
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P60 to P63 (port 6) P60 to P63 function as a 4-bit I/O port. P60 to P63 can be set to input port or output port in 1-bit units using port mode register 6 (PM6). P60 to P63 are ...
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PCL This is a clock output pin. (c) BUZ This is a buzzer output pin. 2.2.12 AV REF This is the A/D converter reference voltage input pin. When the A/D converter is not used, connect this pin directly to ...
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Pin I/O Circuits and Recommended Connection of Unused Pins Table 2-2 shows the types of pin I/O circuits and the recommended connections of unused pins. Refer to Figure 2-1 for the configuration of the I/O circuit of each type. ...
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Pin Name I/O Circuit Type RESET 2 XT1 16 XT2 AV REF AV SS FLMD0 Notes 1. Bit 6 (FRC) of the processor clock control register (PCC) must be set to 1 after reset mode is released. 2. Connect port ...
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Type 2 IN Schmitt-triggered input with hysteresis characteristics Type 3-C P-ch Data N-ch Type 5-A Pullup enable V Data Output disable Input enable 44 CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (1/2) Type 8-A Pullup enable Data ...
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Type 13-W Data N-ch Output disable Input enable Middle-voltage input buffer CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (2/2) Type 16 IN/OUT XT1 User’s Manual U16899EJ3V0UD Feedback cut-off P-ch XT2 45 ...
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Memory Space Products in the 78K0/KE1+ can each access memory space. Figures 3-1 to 3-6 show the memory maps. Caution Regardless of the internal memory capacity, the initial values of the internal memory size switching register ...
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Special function registers General-purpose Internal high-speed RAM ...
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Special function registers 256 General-purpose registers Internal high-speed RAM 1024 ...
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Special function registers General-purpose Internal high-speed RAM ...
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FFFFH Special function registers FF00H FEFFH General-purpose FEE0H FEDFH Internal high-speed RAM FB00H FAFFH Data memory space F800H F7FFH RAM space in Internal expansion RAM which instruction can be fetched F400H F3FFH C000H BFFFH Program memory space 0000H Note ...
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FFFFH Special function registers FF00H FEFFH General-purpose FEE0H FEDFH Internal high-speed RAM FB00H FAFFH Data memory space F800H F7FFH RAM space in Internal expansion RAM which instruction can be fetched F400H F3FFH F000H EFFFH Program memory space 0000H Note ...
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FFFFH Special function registers FF00H FEFFH General-purpose FEE0H FEDFH Internal high-speed RAM FB00H FAFFH Data memory space F800H F7FFH RAM space in Internal expansion RAM which instruction can be fetched F400H F3FFH F000H EFFFH Program memory space 0000H Notes ...
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Internal program memory space The internal program memory space stores the program and table data. Normally addressed with the program counter (PC). 78K0/KE1+ products incorporate internal ROM (flash memory), as shown below. Part Number PD78F0132H PD78F0133H PD78F0134H ...
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CALLT instruction table area The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT). (3) Option byte area The option byte area is assigned to the 1-byte area of 0080H. Refer ...
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Special function register (SFR) area On-chip peripheral hardware special function registers (SFRs) are allocated in the area FF00H to FFFFH (refer to Table 3-6 Special Function Register List in 3.2.3 Special function registers (SFRs)). Caution Do not access addresses ...
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Figure 3-8. Correspondence Between Data Memory and Addressing ( PD78F0133H Special function registers (SFR) 256 8 bits ...
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CHAPTER 3 CPU ARCHITECTURE Figure 3-9. Correspondence Between Data Memory and Addressing ( PD78F0134H Special function registers (SFR) 256 8 bits ...
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Figure 3-10. Correspondence Between Data Memory and Addressing ( PD78F0136H) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH General-purpose registers 32 8 bits FEE0H FEDFH Internal high-speed RAM 1024 8 bits FE20H FE1FH FB00H FAFFH Reserved ...
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CHAPTER 3 CPU ARCHITECTURE Figure 3-11. Correspondence Between Data Memory and Addressing ( PD78F0138H) FFFFH Special function registers (SFR) 256 8 bits FF20H FF1FH FF00H FEFFH General-purpose registers 32 8 bits FEE0H FEDFH Internal high-speed RAM 1024 8 bits FE20H ...
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Figure 3-12. Correspondence Between Data Memory and Addressing ( PD78F0138HD) FFFFH Special function registers (SFR) 256 FF20H FF1FH FF00H FEFFH General-purpose registers 32 8 bits FEE0H FEDFH Internal high-speed RAM 1024 Note 1 FB00H FAFFH Reserved F800H F7FFH Internal expansion ...
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Processor Registers The 78K0/KE1+ products incorporate the following processor registers. 3.2.1 Control registers The control registers control the program sequence, statuses and stack memory. The control registers consist of a program counter (PC), a program status word (PSW) and ...
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Zero flag (Z) When the operation result is zero, this flag is set (1 reset (0) in all other cases. (c) Register bank select flags (RBS0 and RBS1) These are 2-bit flags to select one of the ...
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CHAPTER 3 CPU ARCHITECTURE Figure 3-16. Data to Be Saved to Stack Memory (a) PUSH rp instruction (when SP = FEE0H) FEE0H FEE0H SP FEDFH FEDEH SP FEDEH (b) CALL, CALLF, CALLT instructions (when SP = FEE0H) SP FEE0H FEE0H ...
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Figure 3-17. Data to Be Restored from Stack Memory (a) POP rp instruction (when SP = FEDEH (c) RETI, RETB instructions (when SP = FEDDH CHAPTER 3 CPU ARCHITECTURE FEE0H FEE0H FEDFH Register ...
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General-purpose registers General-purpose registers are mapped at particular addresses (FEE0H to FEFFH) of the data memory. The general-purpose registers consists of 4 banks, each bank consisting of eight 8-bit registers ( and H). ...
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Special function registers (SFRs) Unlike a general-purpose register, each special function register has a special function. SFRs are allocated to the FF00H to FFFFH area. Special function registers can be manipulated like general-purpose registers, using operation, transfer and bit ...
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Table 3-6. Special Function Register List (1/4) Address Special Function Register (SFR) Name FF00H Port register 0 FF01H Port register 1 FF02H Port register 2 FF03H Port register 3 FF04H Port register 4 FF05H Port register 5 FF06H Port register ...
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Table 3-6. Special Function Register List (2/4) Address Special Function Register (SFR) Name FF30H Pull-up resistor option register 0 FF31H Pull-up resistor option register 1 FF33H Pull-up resistor option register 3 FF34H Pull-up resistor option register 4 FF35H Pull-up resistor ...
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Table 3-6. Special Function Register List (3/4) Address Special Function Register (SFR) Name FF6CH 8-bit timer H mode register 1 FF6DH 8-bit timer H carrier control register 1 FF6EH Key return mode register FF6FH Watch timer operation mode register FF70H ...
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Table 3-6. Special Function Register List (4/4) Address Special Function Register (SFR) Name FFBCH Capture/compare control register 00 FFBDH 16-bit timer output control register 00 FFBEH Low-voltage detection register FFBFH Low-voltage detection level selection register FFC0H Flash protect command register ...
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Instruction Address Addressing An instruction address is determined by program counter (PC) contents and is normally incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is ...
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Immediate addressing [Function] Immediate data in the instruction word is transferred to the program counter (PC) and branched. This function is carried out when the CALL !addr16 or BR !addr16 or CALLF !addr11 instruction is executed. CALL !addr16 and ...
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Table indirect addressing [Function] Table contents (branch destination address) of the particular location to be addressed by bits the immediate data of an operation code are transferred to the program counter (PC) and branched. This ...
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Operand Address Addressing The following methods are available to specify the register and memory (addressing) to undergo manipulation during instruction execution. 3.4.1 Implied addressing [Function] The register that functions as an accumulator (A and AX) among the general-purpose registers ...
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Register addressing [Function] The general-purpose register to be specified is accessed as an operand with the register bank select flags (RBS0 to RBS1) and the register specify codes (Rn and RPn operation code. Register addressing is carried ...
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Direct addressing [Function] The memory to be manipulated is directly addressed with immediate data in an instruction word becoming an operand address. [Operand format] [Description example] MOV A, !0FE00H; when setting !addr16 to FE00H Operation code [Illustration ...
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Short direct addressing [Function] The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word. This addressing is applied to the 256-byte space FE20H to FF1FH. Internal RAM and special function ...
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Special function register (SFR) addressing [Function] A memory-mapped special function register (SFR) is addressed with 8-bit immediate data in an instruction word. This addressing is applied to the 240-byte spaces FF00H to FFCFH and FFE0H to FFFFH. However, the ...
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Register indirect addressing [Function] Register pair contents specified by a register pair specify code in an instruction word and by a register bank select flag (RBS0 and RBS1) serve as an operand address for addressing the memory. This addressing ...
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Based addressing [Function] 8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), and ...
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Based indexed addressing [Function] The register contents specified in an instruction word are added to the contents of the base register, that is, the HL register pair in the register bank specified by the register bank ...
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Stack addressing [Function] The stack area is indirectly addressed with the stack pointer (SP) contents. This addressing method is automatically employed when the PUSH, POP, subroutine call and return instructions are executed or the register is saved/reset upon generation ...
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Port Functions There are two types of pin I/O buffer power supplies: AV supplies and the pins is shown below. Power Supply AV REF EV DD 78K0/KE1+ products are provided with the ports shown in Figure 4-1, which enable ...
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Pin Name I/O P00 I/O Port 0. 7-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a P03 software setting. P04 P05 P06 P10 I/O Port 1. ...
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Pin Name I/O P120 I/O Port 12. 1-bit I/O port. Use of an on-chip pull-up resistor can be specified by a software setting. P130 Output Port 13. 1-bit output-only port. P140 I/O Port 14. 2-bit I/O port. P141 Input/output can ...
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Port 0 Port 7-bit I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units using port mode register 0 (PM0). When the P00 to P06 ...
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Figure 4-3. Block Diagram of P01 and P06 WR PU PU0 PU01, PU06 Alternate function RD WR PORT Output latch (P01, P06 PM0 PM01, PM06 Alternate function Note Available only in the PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD. ...
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WR PU PU0 PU02 RD WR PORT Output latch (P02 PM0 PM02 Alternate function Note Available only in the PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD. PU0: Pull-up resistor option register 0 PM0: Port mode register 0 RD: Read ...
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WR PU PU0 PU04 Alternate function RD WR PORT Output latch (P04 PM0 PM04 Alternate function Note Available only in the PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD. PU0: Pull-up resistor option register 0 PM0: Port mode register 0 ...
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Port 1 Port 8-bit I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port mode register 1 (PM1). When the P10 to P17 ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-7. Block Diagram of P11 and P14 WR PU PU1 PU11, PU14 Alternate function RD WR PORT Output latch (P11, P14 PM1 PM11, PM14 PU1: Pull-up resistor option register 1 PM1: Port mode ...
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Figure 4-8. Block Diagram of P12 and P15 WR PU PU1 PU12, PU15 RD WR PORT Output latch (P12, P15 PM1 PM12, PM15 Alternate function PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-9. Block Diagram of P13 WR PU PU1 PU13 RD WR PORT Output latch (P13 PM1 PM13 Alternate function PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal ...
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Figure 4-10. Block Diagram of P16 and P17 WR PU PU1 PU16, PU17 Alternate function RD WR PORT Output latch (P16, P17 PM1 PM16, PM17 Alternate function PU1: Pull-up resistor option register 1 PM1: Port mode register 1 ...
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Port 2 Port 8-bit input-only port. This port can also be used for A/D converter analog input. Figure 4-11 shows a block diagram of port 2. Figure 4-11. Block Diagram of P20 to P27 RD A/D ...
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Port 3 Port 4-bit I/O port with an output latch. Port 3 can be set to the input mode or output mode in 1-bit units using port mode register 3 (PM3). When used as an input ...
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CHAPTER 4 PORT FUNCTIONS Figure 4-13. Block Diagram of P33 WR PU PU3 PU33 Alternate function RD WR PORT Output latch (P33 PM3 PM33 Alternate function PU3: Pull-up resistor option register 3 PM3: Port mode register 3 RD: ...
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Port 4 Port 4-bit I/O port with an output latch. Port 4 can be set to the input mode or output mode in 1-bit units using port mode register 4 (PM4). Use of an on-chip pull-up ...
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Port 5 Port 4-bit I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units using port mode register 5 (PM5). Use of an on-chip pull-up ...
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Port 6 Port 4-bit I/O port with an output latch. Port 6 can be set to the input mode or output mode in 1-bit units using port mode register 6 (PM6). The P60 to P63 pins ...
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Port 7 Port 8-bit I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units using port mode register 7 (PM7). When the P70 to P77 ...
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Port 12 Port 1-bit I/O port with an output latch. Port 12 can be set to the input mode or output mode in 1-bit units using port mode register 12 (PM12). When used as an input ...
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Port 13 Port 1-bit output-only port. Figure 4-19 shows a block diagram of port 13 PORT Output latch (P130) RD: Read signal WR : Write signal Remark When reset is effected, P130 outputs a ...
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Port 14 Port 2-bit I/O port with an output latch. Port 14 can be set to the input mode or output mode in 1-bit units using port mode register 14 (PM14). When the P140 and P141 ...
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Registers Controlling Port Function Port functions are controlled by the following three types of registers. Port mode registers (PM0, PM1, PM3 to PM7, PM12, PM14) Port registers (P0 to P7, P12 to P14) Pull-up resistor option registers (PU0, PU1, ...
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Table 4-4. Settings of Port Mode Register and Output Latch When Using Alternate Function Pin Name P00 TI000 P01 TI010 TO00 Note P02 SO11 Note P03 SI11 Note P04 SCK11 Note P05 SSI11 Note TI001 Note P06 TI011 Note TO01 ...
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Port registers (P0 to P7, P12 to P14) These registers write the data that is output from the chip when data is output from a port. If the data is read in the input mode, the pin level is ...
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Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, and PU14) These registers specify whether the on-chip pull-up resistors of P00 to P06, P10 to P17, P30 to P33, P40 to P43, P50 to P53, P70 to ...
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Port Function Operations Port operations differ depending on whether the input or output mode is set, as shown below. Caution In the case of 1-bit memory manipulation instruction, although a single bit is manipulated, the port is accessed as ...
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Functions of Clock Generator The clock generator generates the clock to be supplied to the CPU and peripheral hardware. The following three system clock oscillators are available. High-speed system clock oscillator The high-speed system clock oscillator oscillates a clock ...
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Figure 5-1. Block Diagram of Clock Generator Main OSC Main clock control mode register register (MCM) (MOC) MCC CLS MSTOP MCS MCM0 STOP X1 High-speed system clock f XP Operation X2 oscillator clock switch Internal oscillator f R Option byte ...
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Registers Controlling Clock Generator The following six registers are used to control the clock generator. Processor clock control register (PCC) Internal oscillation mode register (RCM) Main clock mode register (MCM) Main OSC control register (MOC) Oscillation stabilization time counter ...
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Figure 5-2. Format of Processor Clock Control Register (PCC) Address: FFFBH After reset: 00H Symbol <7> PCC MCC MCC 0 Oscillation possible 1 Oscillation stopped FRC 0 On-chip feedback resistor used 1 On-chip feedback resistor not used CLS 0 High-speed ...
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Remarks 1. MCM0: Bit 0 of the main clock mode register (MCM Main system clock oscillation frequency (high-speed system clock oscillation frequency or X internal oscillation clock oscillation frequency Internal oscillation clock oscillation frequency ...
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Main clock mode register (MCM) This register sets the CPU clock (high-speed system clock/internal oscillation clock). MCM can be set by a 1-bit or 8-bit memory manipulation instruction. RESET input clears this register to 00H. Figure 5-4. Format of ...
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Main OSC control register (MOC) This register selects the operation mode of the high-speed system clock. This register is used to stop the high-speed system clock oscillator operation when the CPU is operating with the internal oscillation clock. Therefore, ...
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Oscillation stabilization time counter status register (OSTC) This is the status register of the high-speed system clock oscillation stabilization time counter. If the internal oscillation clock is used as the CPU clock, the high-speed system clock oscillation stabilization time ...
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Oscillation stabilization time select register (OSTS) This register is used to select the high-speed system clock oscillation stabilization wait time when STOP mode is released. The wait time set by OSTS is valid only after STOP mode is released ...
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System Clock Oscillator 5.4.1 High-speed system clock oscillator The high-speed system clock oscillator oscillates with a crystal resonator or ceramic resonator connected to the X1 and X2 pins. An external clock can be input to the high-speed system clock ...
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Caution When using the high-speed system clock oscillator and subsystem clock oscillator, wire as follows in the area enclosed by the broken lines in the Figures 5-8 and 5-9 to avoid an adverse effect from wiring capacitance. • Keep the ...
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Figure 5-10. Examples of Incorrect Resonator Connection (2/2) (c) Wiring near high alternating current (e) Signals are fetched Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, ...
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When subsystem clock is not used not necessary to use the subsystem clock for low power consumption operations and watch operations, connect the XT1 and XT2 pins as follows. XT1: Connect directly ...
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Clock Generator Operation The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby mode. High-speed system clock f XP Internal oscillation clock f R Subsystem clock f XT CPU clock f ...
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Figure 5-12. Timing Diagram of CPU Default Start Using Internal Oscillator High-speed system clock ( Internal oscillation clock ( Subsystem clock ( RESET CPU clock Operation stopped: 17/f R High-speed system clock oscillation stabilization ...
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A status transition diagram of this product is shown in Figure 5-13, and the relationship between the operation clocks in each operation status and between the oscillation control flag and oscillation status of each clock are shown in Tables 5-3 ...
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Figure 5-13. Status Transition Diagram (2/4) (2) When “internal oscillator can be stopped by software” is selected by option byte Status 6 CPU clock Oscillation XP stopped f : Oscillating/ R oscillation stopped MCC = 0 ...
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Figure 5-13. Status Transition Diagram (3/4) (3) When “internal oscillator cannot be stopped” is selected by option byte (when subsystem clock is not used) Interrupt HALT instruction Status 3 MCM0 = 0 CPU clock Oscillating XP ...
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Figure 5-13. Status Transition Diagram (4/4) (4) When “internal oscillator cannot be stopped” is selected by option byte Status 5 CPU clock Oscillation stopped Oscillating R MCC = 0 MCC = 1 HALT ...
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Table 5-3. Relationship Between Operation Clocks in Each Operation Status Status High-Speed System Clock Oscillator MSTOP = 0 MSTOP = 1 Operation Mode MCC = 0 MCC = 1 Reset Stopped STOP HALT Oscillating Stopped Notes 1. When “Cannot be ...
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Time Required to Switch Between Internal Oscillation Clock and High-Speed System Clock Bit 0 (MCM0) of the main clock mode register (MCM) is used to switch between the internal oscillation clock and high-speed system clock. In the actual switching ...
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Time Required for CPU Clock Switchover The CPU clock can be switched using bits (PCC0 to PCC2) and bit 4 (CSS) of the processor clock control register (PCC). The actual switchover operation is not performed immediately ...
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Clock Switching Flowchart and Register Setting 5.8.1 Switching from internal oscillation clock to high-speed system clock Figure 5-14. Switching from internal oscillation Clock to High-Speed System Clock (Flowchart) Register value after reset High-speed system clock Internal oscillation oscillation stabilization ...
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Switching from high-speed system clock to internal oscillation clock Figure 5-15. Switching from High-Speed System Clock to internal oscillation Clock (Flowchart) Register setting in high-speed system clock operation Yes: RSTOP = 1 High-speed system clock operation RSTOP = 0 ...
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Switching from high-speed system clock to subsystem clock Figure 5-16. Switching from High-Speed System Clock to Subsystem Clock (Flowchart) Register setting in high-speed system clock operation High-speed system clock operation Subsystem clock Note Set CSS to 1 after confirming ...
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Switching from subsystem clock to high-speed system clock Figure 5-17. Switching from Subsystem Clock to High-Speed System Clock (Flowchart) No: High-speed system Subsystem clock operation High-speed system clock oscillation stabilization time not elapsed High-speed system cock operation CHAPTER 5 ...
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Register settings The table below shows the statuses of the setting flags and status flags when each mode is set. f Mode CPU High-speed Internal oscillator Note 2 system clock oscillating Internal oscillator stopped Internal oscillation High-speed system clock ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 The PD78F0132H incorporates 16-bit timer/event counter 00, and the PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD incorporate 16-bit timer/event counters 00 and 01. 6.1 Functions of 16-Bit Timer/Event Counters 00 and 01 16-bit ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.2 Configuration of 16-Bit Timer/Event Counters 00 and 01 16-bit timer/event counters 00 and 01 include the following hardware. Table 6-1. Configuration of 16-Bit Timer/Event Counters 00 and 01 Item Timer counter ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-2. Block Diagram of 16-Bit Timer/Event Counter 01 ( PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD Only) Internal bus Capture/compare control register 01 (CRC01) CRC012CRC011 CRC010 To CR011 Noise elimi- TI011/TO01/P06 nator f ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (1) 16-bit timer counter 0n (TM0n) TM0n is a 16-bit read-only register that counts count pulses. The counter is incremented in synchronization with the rising edge of the input clock. Figure 6-3. ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Table 6-2. CR00n Capture Trigger and Valid Edges of TI00n and TI01n Pins (1) TI00n pin valid edge selected as capture trigger (CRC0n1 = 1, CRC0n0 = 1) CR00n Capture Trigger Falling ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (3) 16-bit timer capture/compare register 01n (CR01n) CR01n is a 16-bit register that has the functions of both a capture register and a compare register. Whether it is used as a capture ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.3 Registers Controlling 16-Bit Timer/Event Counters 00 and 01 The following six registers are used to control 16-bit timer/event counters 00 and 01. 16-bit timer mode control register 0n (TMC0n) Capture/compare control ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-6. Format of 16-Bit Timer Mode Control Register 00 (TMC00) Address FFBAH After reset: 00H R/W Symbol TMC00 TMC003 TMC003 TMC002 TMC001 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-7. Format of 16-Bit Timer Mode Control Register 01 (TMC01) Address FFB6H After reset: 00H R/W Symbol TMC01 TMC013 TMC013 TMC012 TMC011 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (2) Capture/compare control register 0n (CRC0n) This register controls the operation of the 16-bit timer capture/compare registers (CR00n, CR01n). CRC0n can be set by a 1-bit or 8-bit memory manipulation instruction. RESET ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-9. Format of Capture/Compare Control Register 01 (CRC01) Address: FFB8H After reset: 00H Symbol 7 6 CRC01 0 0 CRC012 0 Operates as compare register 1 Operates as capture register CRC011 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-10. Format of 16-Bit Timer Output Control Register 00 (TOC00) Address: FFBDH After reset: 00H Symbol 7 <6> TOC00 0 OSPT00 OSPT00 0 No one-shot pulse output trigger 1 One-shot pulse ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-11. Format of 16-Bit Timer Output Control Register 01 (TOC01) Address: FFB9H After reset: 00H Symbol 7 <6> TOC01 0 OSPT01 OSPT01 0 No one-shot pulse output trigger 1 One-shot pulse ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (4) Prescaler mode register 0n (PRM0n) This register is used to set the 16-bit timer counter 0n (TM0n) count clock and TI00n and TI01n pin input valid edges. PRM0n can be set ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Cautions 1. When the internal oscillation clock is selected as the clock to be supplied to the CPU, the clock of the internal oscillator is divided and supplied as the count clock. ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-13. Format of Prescaler Mode Register 01 (PRM01) Address: FFB7H After reset: 00H Symbol 7 PRM01 ES111 ES111 ES011 PRM011 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Cautions 1. When the internal oscillation clock is selected as the clock to be supplied to the CPU, the clock of the internal oscillator is divided and supplied as the count clock. ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4 Operation of 16-Bit Timer/Event Counters 00 and 01 6.4.1 Interval timer operation Setting 16-bit timer mode control register 0n (TMC0n) and capture/compare control register 0n (CRC0n) as shown in Figure 6-15 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-15. Control Register Settings for Interval Timer Operation (a) 16-bit timer mode control register 0n (TMC0n TMC0n3 TMC0n (b) Capture/compare control register 0n ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-16. Interval Timer Configuration Diagram Note Note Note ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4.2 PPG output operations Setting 16-bit timer mode control register 0n (TMC0n) and capture/compare control register 0n (CRC0n) as shown in Figure 6-18 allows operation as PPG (Programmable Pulse Generator) output. Setting ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-18. Control Register Settings for PPG Output Operation (a) 16-bit timer mode control register 0n (TMC0n TMC0n (b) Capture/compare control register 0n (CRC0n) ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-19. Configuration Diagram of PPG Output Note Note Note ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4.3 Pulse width measurement operations It is possible to measure the pulse width of the signals input to the TI00n pin and TI01n pin using 16-bit timer counter 0n (TM0n). There are ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (1) Pulse width measurement with free-running counter and one capture register When 16-bit timer counter 0n (TM0n) is operated in free-running mode, and the edge specified by prescaler mode register 0n (PRM0n) ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-23. Configuration Diagram for Pulse Width Measurement with Free-Running Counter Note Note Note f /2 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (2) Measurement of two pulse widths with free-running counter When 16-bit timer counter 0n (TM0n) is operated in free-running mode possible to simultaneously measure the pulse widths of the two ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-26. Timing of Pulse Width Measurement Operation with Free-Running Counter (with Both Edges Specified) t Count clock 0000H 0001H TM0n count value TI00n pin input CR01n capture value INTTM01n TI01n pin ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (3) Pulse width measurement with free-running counter and two capture registers When 16-bit timer counter 0n (TM0n) is operated in free-running mode possible to measure the pulse width of the ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-28. Timing of Pulse Width Measurement Operation with Free-Running Counter and Two Capture Registers (with Rising Edge Specified) t Count clock TM0n count value 0000H 0001H TI00n pin input CR01n capture ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-29. Control Register Settings for Pulse Width Measurement by Means of Restart (a) 16-bit timer mode control register 0n (TMC0n TMC0n (b) Capture/compare ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4.4 External event counter operation Setting The basic operation setting procedure is as follows. <1> Set the CRC0n register (see Figure 6-31 for the set value). <2> Set the count clock by ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-31. Control Register Settings in External Event Counter Mode (with Rising Edge Specified) (a) 16-bit timer mode control register 0n (TMC0n TMC0n3 TMC0n ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-32. Configuration Diagram of External Event Counter Noise eliminator f X Valid edge of TI00n pin Note OVF0n is set to 1 only when CR00n is set to FFFFH. Figure 6-33. ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4.5 Square-wave output operation Setting The basic operation setting procedure is as follows. <1> Set the count clock by using the PRM0n register. <2> Set the CRC0n register (see Figure 6-34 for ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-34. Control Register Settings in Square-Wave Output Mode (2/2) (c) 16-bit timer output control register 0n (TOC0n) 7 OSPT0n OSPE0n TOC0n4 LVS0n TOC0n ES1n1 ES1n0 ES0n1 ES0n0 ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.4.6 One-shot pulse output operation 16-bit timer/event counter 0n can output a one-shot pulse in synchronization with a software trigger or an external trigger (TI00n pin input). Setting The basic operation setting ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-36. Control Register Settings for One-Shot Pulse Output with Software Trigger (a) 16-bit timer mode control register 0n (TMC0n TMC0n (b) Capture/compare control register 0n ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-37. Timing of One-Shot Pulse Output Operation with Software Trigger Set TMC0n to 04H (TM0n count starts) Count clock TM0n count 0000H 0001H CR01n set value N CR00n set value M ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-38. Control Register Settings for One-Shot Pulse Output with External Trigger (a) 16-bit timer mode control register 0n (TMC0n TMC0n (b) Capture/compare control register 0n ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 Figure 6-39. Timing of One-Shot Pulse Output Operation with External Trigger (with Rising Edge Specified) When TMC0n is set to 08H (TM0n count starts) t Count clock TM0n count value 0000H 0001H ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 6.5 Cautions for 16-Bit Timer/Event Counters 00 and 01 (1) Timer start errors An error one clock may occur in the time required for a match signal to be ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (6) Operation of OVF0n flag <1> The OFV0n flag is also set the following case. When any of the following modes is selected: the mode in which clear & ...
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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01 (8) Timer operation <1> Even if 16-bit timer counter 0n (TM0n) is read, the value is not captured by 16-bit timer capture/compare register 01n (CR01n). <2> Regardless of the CPU’s operation mode, ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.1 Functions of 8-Bit Timer/Event Counters 50 and 51 8-bit timer/event counters 50 and 51 have the following functions. Interval timer External event counter Square-wave output PWM output Figures 7-1 and 7-2 ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-2. Block Diagram of 8-Bit Timer/Event Counter 51 8-bit timer compare register 51 (CR51) TI51/TO51/P33/INTP4 8-bit timer counter ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.2 Configuration of 8-Bit Timer/Event Counters 50 and 51 8-bit timer/event counters 50 and 51 include the following hardware. Table 7-1. Configuration of 8-Bit Timer/Event Counters 50 and 51 Item Timer register ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 (2) 8-bit timer compare register 5n (CR5n) CR5n can be read and written by an 8-bit memory manipulation instruction. Except in PWM mode, the value set in CR5n is constantly compared with ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.3 Registers Controlling 8-Bit Timer/Event Counters 50 and 51 The following four registers are used to control 8-bit timer/event counters 50 and 51. Timer clock selection register 5n (TCL5n) 8-bit timer mode ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-6. Format of Timer Clock Selection Register 51 (TCL51) Address: FF8CH After reset: 00H Symbol 7 TCL51 0 TCL512 Note Be sure to ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 (2) 8-bit timer mode control register 5n (TMC5n) TMC5n is a register that performs the following five types of settings. <1> 8-bit timer counter 5n (TM5n) count operation control <2> 8-bit timer ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-8. Format of 8-Bit Timer Mode Control Register 51 (TMC51) Address: FF43H After reset: 00H Symbol <7> 6 TMC51 TCE51 TMC516 TCE51 0 After clearing to 0, count operation disabled (counter ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 (3) Port mode registers 1 and 3 (PM1, PM3) These registers set port 1 and 3 input/output in 1-bit units. When using the P17/TO50/TI50/FLMD1 and P33/TO51/TI51/INTP4 pins for timer output, clear PM17 ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.4 Operations of 8-Bit Timer/Event Counters 50 and 51 7.4.1 Operation as interval timer 8-bit timer/event counter 5n operates as an interval timer that generates interrupt requests repeatedly at intervals of the ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-11. Interval Timer Operation Timing (2/2) Count clock TM5n CR5n TCE5n INTTM5n t Count clock TM5n 01 CR5n FF TCE5n INTTM5n Remark (b) When CR5n = 00H ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.4.2 Operation as external event counter The external event counter counts the number of external clock pulses to be input to the TI5n pin by 8-bit timer counter 5n (TM5n). TM5n is ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.4.3 Square-wave output operation A square wave with any selected frequency is output at intervals determined by the value preset to 8-bit timer compare register 5n (CR5n). The TO5n pin output status ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-13. Square-Wave Output Operation Timing t Count clock TM5n count value 00H 01H 02H Count start CR5n N Note TO5n Note The initial value of TO5n output can be set by ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 (1) PWM output basic operation Setting <1> Set each register. Clear the port output latch (P17 or P33) TCL5n: Select the count clock. CR5n: Compare value TMC5n: Stop the count operation, select ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 Figure 7-14. PWM Output Operation Timing t Count clock TM5n 00H 01H FFH 00H 01H 02H CR5n N TCE5n INTTM5n TO5n <1> t Count clock TM5n 00H 01H FFH 00H 01H 02H ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 (2) Operation with CR5n changed Figure 7-15. Timing of Operation with CR5n Changed (a) CR5n value is changed from before clock rising edge of FFH Value is transferred to ...
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51 7.5 Cautions for 8-Bit Timer/Event Counters 50 and 51 (1) Timer start error An error one clock may occur in the time required for a match signal to be ...