C8051F023R Silicon Laboratories Inc, C8051F023R Datasheet - Page 240

• Manufacturer Part Number: C8051F023R
• Description: IC 8051 MCU 64K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F02xr

Specifications of C8051F023R

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 336-1035-2

C8051F020/1/2/3
22.2. Timer 3
Timer 3 is a 16-bit timer formed by the two 8-bit SFRs, TMR3L (low byte) and TMR3H (high byte). Timer 3 may be
clocked by the external oscillator source (divided by eight) or the system clock (divided by either one or twelve as
specified by the Timer 3 Clock Select bit T3M in the Timer 3 Control Register TMR3CN). Timer 3 is always config-
ured as an auto-reload timer, with the reload value held in the TMR3RLL (low byte) and TMR3RLH (high byte) reg-
isters.
The Timer 3 external clock source feature offers a real-time clock (RTC) mode. When bit T3XCLK (TMR3CN.0) is
set to logic 1, Timer 3 is clocked by the external oscillator input (divided by 8) regardless of the system clock selec-
tion. This split clock domain allows Timer 3 to be clocked by a precision external source while the system clock is
derived from the high-speed internal oscillator. When T3XCLK is logic 0, the Timer 3 clock source is specified by bit
T3M (TMR3CN.1).
Timer 3 can also be used to start an ADC Data Conversion, for SMBus timing (see Section
AGEMENT BUS / I2C BUS
ter mode.
240
Oscillator Source
SYSCLK
External
8
12
T3M
0
1
(SMBUS0)” on page 183), or as a general-purpose timer. Timer 3 does not have a coun-
(from SMBus)
Figure 22.19. Timer 3 Block Diagram
SCL
T3XCLK
Crossbar
1
0
TOE
TR3
Rev. 1.4
Reload
TCLK
TMR3RLL TMR3RLH
TMR3L
TMR3H
“18. SYSTEM MAN-
T3XCLK
T3M
TF3
TR3
(to ADC)
Interrupt