MICRO CTRL 4K 4MHZ OTP 44PLCC

 

PIC16C74-04/L

Manufacturer Part NumberPIC16C74-04/L
DescriptionMICRO CTRL 4K 4MHZ OTP 44PLCC
ManufacturerMicrochip Technology
SeriesPIC® 16C
PIC16C74-04/L datasheets

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Specifications of PIC16C74-04/L

Core ProcessorPICCore Size8-Bit
Speed4MHzConnectivityI²C, SPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o33
Program Memory Size7KB (4K x 14)Program Memory TypeOTP
Ram Size192 x 8Voltage - Supply (vcc/vdd)4 V ~ 6 V
Data ConvertersA/D 8x8bOscillator TypeExternal
Operating Temperature0°C ~ 70°CPackage / Case44-PLCC
For Use WithDVA16XL441 - ADAPTER DEVICE ICE 44PLCCLead Free Status / RoHS StatusRequest inventory verification / Request inventory verification
Eeprom Size-  
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PIC16C7X
TABLE 15-2:
PIC16CXX INSTRUCTION SET
Mnemonic,
Description
Operands
BYTE-ORIENTED FILE REGISTER OPERATIONS
ADDWF
f, d
Add W and f
ANDWF
f, d
AND W with f
CLRF
f
Clear f
CLRW
-
Clear W
COMF
f, d
Complement f
DECF
f, d
Decrement f
DECFSZ
f, d
Decrement f, Skip if 0
INCF
f, d
Increment f
INCFSZ
f, d
Increment f, Skip if 0
IORWF
f, d
Inclusive OR W with f
MOVF
f, d
Move f
MOVWF
f
Move W to f
NOP
-
No Operation
RLF
f, d
Rotate Left f through Carry
RRF
f, d
Rotate Right f through Carry
SUBWF
f, d
Subtract W from f
SWAPF
f, d
Swap nibbles in f
XORWF
f, d
Exclusive OR W with f
BIT-ORIENTED FILE REGISTER OPERATIONS
BCF
f, b
Bit Clear f
BSF
f, b
Bit Set f
BTFSC
f, b
Bit Test f, Skip if Clear
BTFSS
f, b
Bit Test f, Skip if Set
LITERAL AND CONTROL OPERATIONS
ADDLW
k
Add literal and W
ANDLW
k
AND literal with W
CALL
k
Call subroutine
CLRWDT
-
Clear Watchdog Timer
GOTO
k
Go to address
IORLW
k
Inclusive OR literal with W
MOVLW
k
Move literal to W
RETFIE
-
Return from interrupt
RETLW
k
Return with literal in W
RETURN
-
Return from Subroutine
SLEEP
-
Go into standby mode
SUBLW
k
Subtract W from literal
XORLW
k
Exclusive OR literal with W
Note 1: When an I/O register is modified as a function of itself ( e.g., MOVF PORTB, 1), the value used will be that value present
on the pins themselves. For example, if the data latch is '1' for a pin configured as input and is driven low by an external
device, the data will be written back with a '0'.
2: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared if assigned
to the Timer0 Module.
3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is
executed as a NOP.
DS30390E-page 148
Cycles
14-Bit Opcode
Status
Affected
MSb
LSb
1
C,DC,Z
00
0111
dfff
ffff
1
Z
00
0101
dfff
ffff
1
Z
00
0001
lfff
ffff
1
Z
00
0001
0xxx
xxxx
1
Z
00
1001
dfff
ffff
1
Z
00
0011
dfff
ffff
1(2)
00
1011
dfff
ffff
1
Z
00
1010
dfff
ffff
1(2)
00
1111
dfff
ffff
1
Z
00
0100
dfff
ffff
1
Z
00
1000
dfff
ffff
1
00
0000
lfff
ffff
1
00
0000
0xx0
0000
1
C
00
1101
dfff
ffff
1
C
00
1100
dfff
ffff
1
C,DC,Z
00
0010
dfff
ffff
1
00
1110
dfff
ffff
1
Z
00
0110
dfff
ffff
1
01
00bb
bfff
ffff
1
01
01bb
bfff
ffff
1 (2)
01
10bb
bfff
ffff
1 (2)
01
11bb
bfff
ffff
1
C,DC,Z
11
111x
kkkk
kkkk
1
Z
11
1001
kkkk
kkkk
2
10
0kkk
kkkk
kkkk
1
TO
00
0000
0110
0100
2
10
1kkk
kkkk
kkkk
1
Z
11
1000
kkkk
kkkk
1
11
00xx
kkkk
kkkk
2
00
0000
0000
1001
2
11
01xx
kkkk
kkkk
2
00
0000
0000
1000
1
TO
00
0000
0110
0011
1
C,DC,Z
11
110x
kkkk
kkkk
1
Z
11
1010
kkkk
kkkk
1997 Microchip Technology Inc.
Notes
1,2
1,2
2
1,2
1,2
1,2,3
1,2
1,2,3
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
3
3
PD
,
PD
,