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PIC16C74-04/L
PIC16C74-04/L | |
|---|---|
| Manufacturer Part Number | PIC16C74-04/L |
| Description | MICRO CTRL 4K 4MHZ OTP 44PLCC |
| Manufacturer | Microchip Technology |
| Series | PIC® 16C |
| PIC16C74-04/L datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
- We ship worldwide using main international couriers like FedEx, DHL, UPS, TNT, EMS. We can also use client's freight account. Other shipping methods can be discussed. We do best to meet your needs!
Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of PIC16C74-04/L | |||
|---|---|---|---|
| Core Processor | PIC | Core Size | 8-Bit |
| Speed | 4MHz | Connectivity | I²C, SPI, UART/USART |
| Peripherals | POR, PWM, WDT | Number Of I /o | 33 |
| Program Memory Size | 7KB (4K x 14) | Program Memory Type | OTP |
| Ram Size | 192 x 8 | Voltage - Supply (vcc/vdd) | 4 V ~ 6 V |
| Data Converters | A/D 8x8b | Oscillator Type | External |
| Operating Temperature | 0°C ~ 70°C | Package / Case | 44-PLCC |
| For Use With | DVA16XL441 - ADAPTER DEVICE ICE 44PLCC | Lead Free Status / RoHS Status | Request inventory verification / Request inventory verification |
| Eeprom Size | - | ||
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PIC16C7X
LIST OF FIGURES
Figure 3-1:
PIC16C72 Block Diagram ......................... 10
Figure 3-2:
PIC16C73/73A/76 Block Diagram............. 11
Figure 3-3:
PIC16C74/74A/77 Block Diagram............. 12
Figure 3-4:
Clock/Instruction Cycle.............................. 17
Figure 4-1:
PIC16C72 Program Memory Map
and Stack .................................................. 19
Figure 4-2:
PIC16C73/73A/74/74A Program
Memory Map and Stack ............................ 19
Figure 4-3:
PIC16C76/77 Program Memory
Map and Stack .......................................... 20
Figure 4-4:
PIC16C72 Register File Map .................... 21
Figure 4-5:
PIC16C73/73A/74/74A Register
File Map .................................................... 21
Figure 4-6:
PIC16C76/77 Register File Map ............... 22
Figure 4-7:
Status Register (Address 03h,
83h, 103h, 183h) ...................................... 30
Figure 4-8:
OPTION Register (Address 81h,
181h) ......................................................... 31
Figure 4-9:
INTCON Register
(Address 0Bh, 8Bh, 10bh, 18bh)............... 32
Figure 4-10:
PIE1 Register PIC16C72
(Address 8Ch) ........................................... 33
Figure 4-11:
PIE1 Register PIC16C73/73A/
74/74A/76/77 (Address 8Ch)..................... 34
Figure 4-12:
PIR1 Register PIC16C72
(Address 0Ch) ........................................... 35
Figure 4-13:
PIR1 Register PIC16C73/73A/
74/74A/76/77 (Address 0Ch)..................... 36
Figure 4-14:
PIE2 Register (Address 8Dh).................... 37
Figure 4-15:
PIR2 Register (Address 0Dh).................... 38
Figure 4-16:
PCON Register (Address 8Eh) ................. 39
Figure 4-17:
Loading of PC In Different
Situations .................................................. 40
Figure 4-18:
Direct/Indirect Addressing ......................... 41
Figure 5-1:
Block Diagram of RA3:RA0
and RA5 Pins ............................................ 43
Figure 5-2:
Block Diagram of RA4/T0CKI Pin ............. 43
Figure 5-3:
Block Diagram of RB3:RB0 Pins............... 45
Figure 5-4:
Block Diagram of RB7:RB4 Pins
(PIC16C73/74) .......................................... 46
Figure 5-5:
Block Diagram of
RB7:RB4 Pins (PIC16C72/73A/
74A/76/77)................................................. 46
Figure 5-6:
PORTC Block Diagram
(Peripheral Output Override).................... 48
Figure 5-7:
PORTD Block Diagram
(in I/O Port Mode)..................................... 50
Figure 5-8:
PORTE Block Diagram
(in I/O Port Mode)..................................... 51
Figure 5-9:
TRISE Register (Address 89h).................. 51
Figure 5-10:
Successive I/O Operation ......................... 53
Figure 5-11:
PORTD and PORTE Block Diagram
(Parallel Slave Port) .................................. 54
Figure 5-12:
Parallel Slave Port Write Waveforms ........ 55
Figure 5-13:
Parallel Slave Port Read Waveforms........ 55
Figure 7-1:
Timer0 Block Diagram............................... 59
Figure 7-2:
Timer0 Timing: Internal Clock/No
Prescale .................................................... 59
Figure 7-3:
Timer0 Timing: Internal
Clock/Prescale 1:2 .................................... 60
Figure 7-4:
Timer0 Interrupt Timing............................. 60
Figure 7-5:
Timer0 Timing with External Clock............ 61
Figure 7-6:
Block Diagram of the Timer0/WDT
Prescaler ................................................... 62
DS30390E-page 280
Figure 8-1:
T1CON: Timer1 Control Register
(Address 10h) .......................................... 65
Figure 8-2:
Timer1 Block Diagram .............................. 66
Figure 9-1:
Timer2 Block Diagram .............................. 69
Figure 9-2:
T2CON: Timer2 Control Register
(Address 12h) .......................................... 70
Figure 10-1:
CCP1CON Register (Address 17h)/
CCP2CON Register (Address 1Dh).......... 72
Figure 10-2:
Capture Mode Operation
Block Diagram .......................................... 72
Figure 10-3:
Compare Mode Operation
Block Diagram .......................................... 73
Figure 10-4:
Simplified PWM Block Diagram ................ 74
Figure 10-5:
PWM Output ............................................. 74
Figure 11-1:
SSPSTAT: Sync Serial Port Status
Register (Address 94h)............................. 78
Figure 11-2:
SSPCON: Sync Serial Port Control
Register (Address 14h)............................. 79
Figure 11-3:
SSP Block Diagram (SPI Mode) ............... 80
Figure 11-4:
SPI Master/Slave Connection................... 81
Figure 11-5:
SPI Mode Timing, Master Mode
or Slave Mode w/o SS Control.................. 82
Figure 11-6:
SPI Mode Timing, Slave Mode with
SS Control ................................................ 82
Figure 11-7:
SSPSTAT: Sync Serial Port Status
Register (Address 94h)(PIC16C76/77)..... 83
Figure 11-8:
SSPCON: Sync Serial Port Control
Register (Address 14h)(PIC16C76/77)..... 84
Figure 11-9:
SSP Block Diagram (SPI Mode)
(PIC16C76/77).......................................... 85
Figure 11-10:
SPI Master/Slave Connection
PIC16C76/77) ........................................... 86
Figure 11-11:
SPI Mode Timing, Master Mode
(PIC16C76/77)......................................... 87
Figure 11-12:
SPI Mode Timing (Slave Mode
With CKE = 0) (PIC16C76/77) ................. 87
Figure 11-13:
SPI Mode Timing (Slave Mode
With CKE = 1) (PIC16C76/77) .................. 88
Figure 11-14:
Start and Stop Conditions......................... 89
Figure 11-15:
7-bit Address Format ................................ 90
2
Figure 11-16:
I
C 10-bit Address Format ........................ 90
Figure 11-17:
Slave-receiver Acknowledge .................... 90
Figure 11-18:
Data Transfer Wait State .......................... 90
Figure 11-19:
Master-transmitter Sequence ................... 91
Figure 11-20:
Master-receiver Sequence........................ 91
Figure 11-21:
Combined Format ..................................... 91
Figure 11-22:
Multi-master Arbitration
(Two Masters)........................................... 92
Figure 11-23:
Clock Synchronization .............................. 92
Figure 11-24:
SSP Block Diagram
2
(I
C Mode) ................................................ 93
2
Figure 11-25:
I
C Waveforms for Reception
(7-bit Address) .......................................... 95
2
Figure 11-26:
I
C Waveforms for Transmission
(7-bit Address) .......................................... 96
2
Figure 11-27:
Operation of the I
C Module in
IDLE_MODE, RCV_MODE or
XMIT_MODE ............................................ 98
Figure 12-1:
TXSTA: Transmit Status and
Control Register (Address 98h) ................ 99
Figure 12-2:
RCSTA: Receive Status and
Control Register (Address 18h) .............. 100
Figure 12-3:
RX Pin Sampling Scheme. BRGH = 0
(PIC16C73/73A/74/74A) ......................... 104
Figure 12-4:
RX Pin Sampling Scheme, BRGH = 1
(PIC16C73/73A/74/74A) ......................... 104
1997 Microchip Technology Inc.
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