MICRO CTRL 4K 4MHZ OTP 44PLCC

 

PIC16C74-04/L

Manufacturer Part NumberPIC16C74-04/L
DescriptionMICRO CTRL 4K 4MHZ OTP 44PLCC
ManufacturerMicrochip Technology
SeriesPIC® 16C
PIC16C74-04/L datasheets

Availability: By request

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

Select quantity

 

Specifications of PIC16C74-04/L

Core ProcessorPICCore Size8-Bit
Speed4MHzConnectivityI²C, SPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o33
Program Memory Size7KB (4K x 14)Program Memory TypeOTP
Ram Size192 x 8Voltage - Supply (vcc/vdd)4 V ~ 6 V
Data ConvertersA/D 8x8bOscillator TypeExternal
Operating Temperature0°C ~ 70°CPackage / Case44-PLCC
For Use WithDVA16XL441 - ADAPTER DEVICE ICE 44PLCCLead Free Status / RoHS StatusRequest inventory verification / Request inventory verification
Eeprom Size-  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Page 81
82
Page 82
83
Page 83
84
Page 84
85
Page 85
86
Page 86
87
Page 87
88
Page 88
89
Page 89
90
Page 90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
Page 89/289

Download datasheet (3Mb)Embed
PrevNext
2
11.4
I
C™ Overview
This section provides an overview of the Inter-Inte-
2
grated Circuit (I
C) bus, with Section 11.5 discussing
2
the operation of the SSP module in I
C mode.
2
The I
C bus is a two-wire serial interface developed by
the Philips Corporation. The original specification, or
standard mode, was for data transfers of up to 100
Kbps. The enhanced specification (fast mode) is also
supported. This device will communicate with both
standard and fast mode devices if attached to the same
bus. The clock will determine the data rate.
2
The I
C interface employs a comprehensive protocol to
ensure reliable transmission and reception of data.
When transmitting data, one device is the “master”
which initiates transfer on the bus and generates the
clock signals to permit that transfer, while the other
device(s) acts as the “slave.” All portions of the slave
protocol are implemented in the SSP module’s hard-
ware, except general call support, while portions of the
master protocol need to be addressed in the
PIC16CXX software. Table 11-3 defines some of the
2
I
C bus terminology. For additional information on the
2
I
C interface specification, refer to the Philips docu-
2
ment “ The I
C bus and how to use it.” #939839340011,
which can be obtained from the Philips Corporation.
2
In the I
C interface protocol each device has an
address. When a master wishes to initiate a data trans-
fer, it first transmits the address of the device that it
wishes to “talk” to. All devices “listen” to see if this is
their address. Within this address, a bit specifies if the
master wishes to read-from/write-to the slave device.
The master and slave are always in opposite modes
(transmitter/receiver) of operation during a data trans-
fer. That is they can be thought of as operating in either
of these two relations:
• Master-transmitter and Slave-receiver
• Slave-transmitter and Master-receiver
2
TABLE 11-3:
I
C BUS TERMINOLOGY
Term
Transmitter
The device that sends the data to the bus.
Receiver
The device that receives the data from the bus.
Master
The device which initiates the transfer, generates the clock and terminates the transfer.
Slave
The device addressed by a master.
Multi-master
More than one master device in a system. These masters can attempt to control the bus at the
same time without corrupting the message.
Arbitration
Procedure that ensures that only one of the master devices will control the bus. This ensure that
the transfer data does not get corrupted.
Synchronization
Procedure where the clock signals of two or more devices are synchronized.
1997 Microchip Technology Inc.
Applicable Devices
72 73 73A 74 74A 76 77
In both cases the master generates the clock signal.
The output stages of the clock (SCL) and data (SDA)
lines must have an open-drain or open-collector in
order to perform the wired-AND function of the bus.
External pull-up resistors are used to ensure a high
level when no device is pulling the line down. The num-
ber of devices that may be attached to the I
limited only by the maximum bus loading specification
of 400 pF.
11.4.1
INITIATING AND TERMINATING DATA
TRANSFER
During times of no data transfer (idle time), both the
clock line (SCL) and the data line (SDA) are pulled high
through the external pull-up resistors. The START and
STOP conditions determine the start and stop of data
transmission. The START condition is defined as a high
to low transition of the SDA when the SCL is high. The
STOP condition is defined as a low to high transition of
the SDA when the SCL is high. Figure 11-14 shows the
START and STOP conditions. The master generates
these conditions for starting and terminating data trans-
fer. Due to the definition of the START and STOP con-
ditions, when data is being transmitted, the SDA line
can only change state when the SCL line is low.
FIGURE 11-14: START AND STOP
CONDITIONS
SDA
SCL
S
Change
Start
of Data
Condition
Allowed
Description
PIC16C7X
2
C bus is
P
Change
Stop
of Data
Condition
Allowed
DS30390E-page 89

Related parts for PIC16C74-04/L

Part Number DescriptionManufacturer Datasheet
  PIC16C745-1/SPC02 Microchip Technology Inc.
PIC16C745-I/SP  PIC16C745-I/SP IC MCU OTP 8KX14 USB A/D 28DIP Microchip Technology
PIC16C745-I/SO  PIC16C745-I/SO IC MCU OTP 8KX14 USB A/D 28SOIC Microchip Technology
PIC16C74B-04/P  PIC16C74B-04/P IC MCU OTP 4KX14 A/D PWM 40DIP Microchip Technology
PIC16C74B-04I/P  PIC16C74B-04I/P IC MCU OTP 4KX14 A/D PWM 40DIP Microchip Technology
PIC16C74B-20I/P  PIC16C74B-20I/P IC MCU OTP 4KX14 A/D PWM 40DIP Microchip Technology
PIC16C74B-20/L  PIC16C74B-20/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74B-04I/L  PIC16C74B-04I/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74A-04/L  PIC16C74A-04/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74A-20/P  PIC16C74A-20/P IC MCU OTP 4KX14 A/D PWM 40DIP Microchip Technology
PIC16C74A-20/L  PIC16C74A-20/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74A-20I/L  PIC16C74A-20I/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74B-04/L  PIC16C74B-04/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology
PIC16C74B-04I/PQ  PIC16C74B-04I/PQ IC MCU OTP 4KX14 A/D PWM 44-MQFP Microchip Technology
PIC16C74B-20I/L  PIC16C74B-20I/L IC MCU OTP 4KX14 A/D PWM 44PLCC Microchip Technology