IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part NumberATMEGA103-6AI
DescriptionIC MCU 128K 6MHZ A/D IT 64TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA103-6AI datasheets
 


Specifications of ATMEGA103-6AI

Core ProcessorAVRCore Size8-Bit
Speed6MHzConnectivitySPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o32
Program Memory Size128KB (64K x 16)Program Memory TypeFLASH
Eeprom Size4K x 8Ram Size4K x 8
Voltage - Supply (vcc/vdd)4 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case64-TQFP, 64-VQFPFor Use WithATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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X-register, Y-register and Z-
register
ALU – Arithmetic Logic
Unit
ISP Flash Program
Memory
SRAM Data Memory
ATmega103(L)
10
The registers R26..R31 have some added functions to their general purpose usage.
These registers are address pointers for indirect addressing of the SRAM. The three
indirect address registers X, Y, and Z are defined as:
Figure 6. X-, Y-, and Z-registers
15
X-register
7
R27 ($1B)
15
Y-register
7
R29 ($1D)
15
Z-register
7
R31 ($1F)
In the different addressing modes these address registers have functions as fixed dis-
placement, automatic increment and decrement (see the descriptions for the different
instructions).
The high-performance AVR ALU operates in direct connection with all the 32 general
purpose working registers. Within a single clock cycle, ALU operations between regis-
ters in the Register File are executed. The ALU operations are divided into three main
categories: arithmetic, logical and bit functions.
The ATmega103(L) contains 128K bytes of On-chip In-System Programmable Flash
memory for program storage. Since all instructions are single or double 16-bit words, the
Flash is organized as 64K x 16. The Flash memory has an endurance of at least 1000
write/erase cycles.
Constant tables can be allocated in the entire Program memory space (see the LPM –
Load Program Memory and ELPM – Extended Load Program Memory instruction
descriptions).
The ATmega103(L) supports two different configurations for the SRAM Data memory as
listed in Table 1.
Table 1. Memory Configurations
Configuration
Internal SRAM Data Memory
A
4000
B
4000
Note:
When using 64K of external SRAM, 60K will be available.
0
7
R26 ($1A)
0
7
R28 ($1C)
0
7
R30 ($1E)
External SRAM Data Memory
None
up to 64K
0945I–AVR–02/07
0
0
0
0
0
0