IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part NumberATMEGA103-6AI
DescriptionIC MCU 128K 6MHZ A/D IT 64TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA103-6AI datasheets
 


Specifications of ATMEGA103-6AI

Core ProcessorAVRCore Size8-Bit
Speed6MHzConnectivitySPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o32
Program Memory Size128KB (64K x 16)Program Memory TypeFLASH
Eeprom Size4K x 8Ram Size4K x 8
Voltage - Supply (vcc/vdd)4 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case64-TQFP, 64-VQFPFor Use WithATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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Page 21/141

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Stack Pointer – SP
0945I–AVR–02/07
ied into T by the BST instruction and a bit in T can be copied into a bit in a register in the
register file by the BLD instruction.
• Bit 5 – H: Half-carry Flag
The Half-carry Flag H indicates a Half-carry in some arithmetic operations. See the
instruction set description on page 135 for detailed information.
• Bit 4 – S: Sign Bit, S = N ⊕ V
The S-bit is always an exclusive or between the Negative Flag N and the Two’s Comple-
ment Overflow Flag V. See the instruction set description on page 135 for detailed
information.
• Bit 3 – V: Two’s Complement Overflow Flag
The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See
the instruction set description on page 135 for detailed information.
• Bit 2 – N: Negative Flag
The Negative Flag N indicates a negative result from an arithmetical or logical operation.
See the Instruction set description on page 135 for detailed information.
• Bit 1 – Z: Zero Flag
The Zero Flag Z indicates a zero result from an arithmetical or logical operation. See the
instruction set description on page 135 for detailed information.
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetical or logical operation. See the
instruction set description on page 135 for detailed information.
Note that the Status Register is not automatically stored when entering an interrupt rou-
tine or restored when returning from an interrupt routine. This must be handled by
software.
The general AVR 16-bit Stack Pointer is effectively built up of two 8-bit registers in the
I/O space locations $3E ($5E) and $3D ($5D). As the ATmega103(L) supports up to
64K bytes memory, all 16 bits are used.
Bit
15
14
13
$3E ($5E)
SP15
SP14
SP13
$3D ($5D)
SP7
SP6
SP5
7
6
5
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
The Stack Pointer points to the Data SRAM Stack area where the Subroutine and Inter-
rupt Stacks are located. This Stack space in the Data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the Stack with the PUSH instruction and it is decremented by 2
when an address is pushed onto the Stack with subroutine calls and interrupts. The
Stack Pointer is incremented by 1 when data is popped from the Stack with the POP
ATmega103(L)
12
11
10
9
SP12
SP11
SP10
SP9
SP4
SP3
SP2
SP1
4
3
2
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
8
SP8
SPH
SP0
SPL
0
R/W
R/W
0
0
21