IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part NumberATMEGA103-6AI
DescriptionIC MCU 128K 6MHZ A/D IT 64TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA103-6AI datasheets
 


Specifications of ATMEGA103-6AI

Core ProcessorAVRCore Size8-Bit
Speed6MHzConnectivitySPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o32
Program Memory Size128KB (64K x 16)Program Memory TypeFLASH
Eeprom Size4K x 8Ram Size4K x 8
Voltage - Supply (vcc/vdd)4 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case64-TQFP, 64-VQFPFor Use WithATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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Reset Sources
0945I–AVR–02/07
$0012
jmp
TIM2_COMP
$0014
jmp
TIM2_OVF
$0016
jmp
TIM1_CAPT
$0018
jmp
TIM1_COMPA
$001A
jmp
TIM1_COMPB
$001C
jmp
TIM1_OVF
$001E
jmp
TIM0_COMP
$0020
jmp
TIM0_OVF
$0022
jmp
SPI_STC
$0024
jmp
UART_RXC
$0026
jmp
UART_DRE
$0028
jmp
UART_TXC
$002A
jmp
ADC
$002C
jmp
EE_RDY
$002E
jmp
ANA_COMP
;
$0030
MAIN:
ldi
r16, high(RAMEND); Main program start
$0031
out
SPH,r16
$0032
ldi
r16, low(RAMEND)
$0033
out
SPL,r16
$0034
<instr>
xxx
...
...
...
...
The ATmega103(L) has three sources of reset:
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on
Reset threshold (V
).
POT
External Reset. The MCU is reset when a low level is present on the RESET pin for
more than 50 ns.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and
the Watchdog is enabled.
During reset, all I/O Registers except the MCU Status Register are then set to their initial
values and the program starts execution from address $0000. The instruction placed in
address $0000 must be a JMP (absolute jump) instruction to the reset handling routine.
If the program never enables an interrupt source, the Interrupt Vectors are not used and
regular program code can be placed at these locations. The circuit diagram in Figure 23
shows the reset logic. Table 5 defines the timing and electrical parameters of the reset
circuitry.
ATmega103(L)
; Timer2 Compare Handler
; Timer2 Overflow Handler
; Timer1 Capture Handler
; Timer1 Compare A Handler
; Timer1 Compare B Handler
; Timer1 Overflow Handler
; Timer0 Compare Handler
; Timer0 Overflow Handler
; SPI Transfer Complete Handler
; UART RX Complete Handler
; UDR Empty Handler
; UART TX Complete Handler
; ADC Conversion Complete Handler
; EEPROM Ready Handler
; Analog Comparator Handler
25