ATMEGA103-6AI Atmel, ATMEGA103-6AI Datasheet - Page 47

IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part Number
ATMEGA103-6AI
Description
IC MCU 128K 6MHZ A/D IT 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA103-6AI

Core Processor
AVR
Core Size
8-Bit
Speed
6MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
16-bit Timer/Counter1
0945I–AVR–02/07
save mode was entered. After an edge on the asynchronous clock, TCNT0 will read
correctly. (The compare and overflow functions of the Timer are not affected by this
behavior.) Safe procedure to ensure correct value is read:
1. Write any value to either of the registers OCR0 or TCCR0
2. Wait for the corresponding Update Busy Flag to be cleared
3. Read TCNT0
Note that OCR0 and TCCR0 are never modified by hardware, and will always read
correctly.
Figure 33 shows the block diagram for Timer/Counter1.
The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK or an exter-
nal pin. In addition, it can be stopped as described in the specification for the
Timer/Counter1 Control Register (TCCR1B). The different Status Flags (Overflow, Com-
pare Match and Capture Event) are found in the Timer/Counter Interrupt Flag Register
(TIFR). Control signals are found in the Timer/Counter1 Control Registers – TCCR1A
and TCCR1B. The interrupt enable/disable settings for Timer/Counter1 are found in the
Timer/Counter Interrupt Mask Register (TIMSK).
When Timer/Counter1 is externally clocked, the external signal is synchronized with the
Oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 16-bit Timer/Counter1 features both a high-resolution and a high-accuracy usage
with the lower prescaling opportunities. Similarly, the high prescaling opportunities
makes the Timer/Counter1 useful for lower speed functions or exact timing functions
with infrequent actions.
The Timer/Counter1 supports two Output Compare functions using the Output Compare
Registers 1A and 1B (OCR1A and OCR1B) as the data sources to be compared to the
Timer/Counter1 contents. The Output Compare functions include optional clearing of
the counter on Compare A Match, and actions on the Output Compare pins on both
compare matches.
ATmega103(L)
47

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