ATMEGA103-6AI Atmel, ATMEGA103-6AI Datasheet - Page 86

• Manufacturer Part Number: ATMEGA103-6AI
• Description: IC MCU 128K 6MHZ A/D IT 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA103-6AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

I/O Ports
Port A
Port A Data Register – PORTA
Port A Data Direction Register
– DDRA
Port A Input Pins Address –
PINA
Port A as General Digital I/O
86
ATmega103(L)
All AVR ports have true Read-Modify-Write functionality when used as general digital
I/O ports. This means that the direction of one port pin can be changed without uninten-
tionally changing the direction of any other pin with the SBI and CBI instructions. The
same applies for changing drive value (if configured as output) or enabling/disabling of
pull-up resistors (if configured as input).
Port A is an 8-bit bi-directional I/O port with internal pull-ups.
Three I/O memory address locations are allocated for Port A, one each for the Data
Register – PORTA, $1B($3B), Data Direction Register – DDRA, $1A($3A) and the Port
A Input Pins – PINA, $19($39). The Port A Input Pins address is read-only, while the
Data Register and the Data Direction Register are read/write.
All port pins have individually selectable pull-up resistors. The Port A output buffers can
sink 20 mA and thus drive LED displays directly. When pins PA0 to PA7 are used as
inputs and are externally pulled low, they will source current if the internal pull-up resis-
tors are activated.
The Port A pins have alternate functions related to the optional external data SRAM.
Port A can be configured to be the multiplexed low-order address/data bus during
accesses to the byte.
When Port A is set to the alternate function by the SRE (External SRAM Enable) bit in
the MCUCR (MCU Control Register), the alternate settings override the Data Direction
Register.
The Port A Input Pins address (PINA) is not a register; this address enables access to
the physical value on each Port A pin. When reading PORTA the Port A Data Latch is
read and when reading PINA, the logical values present on the pins are read.
All eight pins in Port A have equal functionality when used as digital I/O pins.
PAn, general I/O pin: The DDAn bit in the DDRA Register selects the direction of this
pin. If DDAn is set (one), PAn is configured as an output pin. If DDAn is cleared (zero),
PAn is configured as an input pin. If PORTAn is set (one) when the pin configured as an
input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, POR-
TAn has to be cleared (zero) or the pin has to be configured as an output pin. The port
Bit
$1B ($3B)
Read/Write
Initial Value
Bit
$1A ($3A)
Read/Write
Initial Value
Bit
$19 ($39)
Read/Write
Initial Value
PORTA7
PINA7
DDA7
R/W
R/W
N/A
R
7
0
7
0
7
PORTA6
PINA6
DDA6
R/W
R/W
N/A
R
6
0
6
0
6
PORTA5
PINA5
DDA5
R/W
R/W
N/A
5
0
5
0
5
R
PORTA4
PINA4
DDA4
R/W
R/W
N/A
R
4
0
4
0
4
PORTA3
PINA3
DDA3
R/W
R/W
N/A
R
3
0
3
0
3
PORTA2
PINA2
DDA2
R/W
R/W
N/A
R
2
0
2
0
2
PORTA1
PINA1
DDA1
R/W
R/W
N/A
R
1
0
1
0
1
PORTA0
PINA0
DDA0
R/W
R/W
N/A
R
0
0
0
0
0
0945I–AVR–02/07
PORTA
DDRA
PINA