ATMEGA103L-4AI Atmel, ATMEGA103L-4AI Datasheet - Page 88
ATMEGA103L-4AI
Manufacturer Part Number
ATMEGA103L-4AI
Description
IC MCU 128K 4MHZ A/D LV 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA103-6AC.pdf
(141 pages)
2.ATMEGA103-6AC.pdf
(4 pages)
3.ATMEGA103L-4AC.pdf
(4 pages)
Specifications of ATMEGA103L-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Port B Data Register – PORTB
Port B Data Direction Register
– DDRB
Port B Input Pins Address –
PINB
Port B as General Digital I/O
88
ATmega103(L)
inputs and are externally pulled low, they will source current if the internal pull-up resis-
tors are activated.
The Port B pins with alternate functions are shown in Table 29.
Table 29. Port B Pin Alternate Functions
When the pins are used for the alternate function, the DDRB and PORTB Registers
have to be set according to the alternate function description.
The Port B Input Pins address (PINB) is not a register; this address enables access to
the physical value on each Port B pin. When reading PORTB, the Port B Data Latch is
read and when reading PINB, the logical values present on the pins are read.
All eight pins in Port B have equal functionality when used as digital I/O pins.
PBn, general I/O pin: The DDBn bit in the DDRB Register selects the direction of this
pin. If DDBn is set (one), PBn is configured as an output pin. If DDBn is cleared (zero),
PBn is configured as an input pin. If PORTBn is set (one) when the pin configured as an
input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, the
PORTBn has to be cleared (zero) or the pin has to be configured as an output pin. The
port pins are tri-stated when a reset condition becomes active, even if the clock is not
running.
Bit
$18 ($38)
Read/Write
Initial Value
Bit
$17 ($37)
Read/Write
Initial Value
Bit
$16 ($36)
Read/Write
Initial Value
Port Pin
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PORTB7
Alternate Functions
SS (SPI Slave Select input)
SCK (SPI Bus Serial Clock)
MOSI (SPI Bus Master Output/Slave Input)
MISO (SPI Bus Master Input/Slave Output)
OC0/PWM0 (Output Compare and PWM Output for Timer/Counter0)
OC1A/PWM1A (Output Compare and PWM Output A for Timer/Counter1)
OC1B/PWM1B (Output Compare and PWM Output B for Timer/Counter1)
OC2/PWM2 (Output Compare and PWM Output for Timer/Counter2)
PINB7
DDB7
R/W
R/W
N/A
R
7
0
7
0
7
PORTB6
PINB6
DDB6
R/W
R/W
N/A
R
6
0
6
0
6
PORTB5
PINB5
DDB5
R/W
R/W
N/A
5
0
5
0
5
R
PORTB4
PINB4
DDB4
R/W
R/W
N/A
R
4
0
4
0
4
PORTB3
PINB3
DDB3
R/W
R/W
N/A
R
3
0
3
0
3
PORTB2
PINB2
DDB2
R/W
R/W
N/A
R
2
0
2
0
2
PORTB1
PINB1
DDB1
R/W
R/W
N/A
R
1
0
1
0
1
PORTB0
PINB0
DDB0
R/W
R/W
N/A
R
0
0
0
0
0
0945I–AVR–02/07
PORTB
DDRB
PINB
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