T89C51RD2-SLSIM Atmel, T89C51RD2-SLSIM Datasheet - Page 25

IC MICRO CTRL 64K FLASH 44PLCC

T89C51RD2-SLSIM

Manufacturer Part Number
T89C51RD2-SLSIM
Description
IC MICRO CTRL 64K FLASH 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of T89C51RD2-SLSIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
4243G–8051–05/03
The CMOD SFR includes three additional bits associated with the PCA (See Figure 7
and Table 10).
The CCON SFR contains the run control bit for the PCA and the flags for the PCA timer
(CF) and each module (Refer to Table 11).
Table 11. CCON: PCA Counter Control Register
1.
The watchdog timer function is implemented in module 4 (See Figure 10).
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
Address 0D8H
Symbol
The CIDL bit which allows the PCA to stop during idle mode.
The WDTE bit which enables or disables the watchdog function on module 4.
The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in
the CCON SFR) to be set when the PCA timer overflows.
Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by
clearing this bit.
Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an
interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can
only be cleared by software.
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,
etc.) and are set by hardware when either a match or a capture occurs. These flags
also can only be cleared by software.
CCON
User software should not write 1s to reserved bits. These bits may be used in future 8051
family products to invoke new features. In that case, the reset or inactive value of the
new bit will be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags
an interrupt if bit ECF in CMOD is set. CF may be set by either hardware or software but
can only be cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared
by software to turn the PCA counter off.
Not implemented, reserved for future use.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
Reset value
CF
0
CR
0
X
(1)
-
CCF4
0
CCF3
0
T89C51RD2
CCF2
0
CCF1
0
CCF0
0
25

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