T89C51RD2-SLSIM Atmel, T89C51RD2-SLSIM Datasheet - Page 76
T89C51RD2-SLSIM
Manufacturer Part Number
T89C51RD2-SLSIM
Description
IC MICRO CTRL 64K FLASH 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C51RD2-SMSIM.pdf
(104 pages)
Specifications of T89C51RD2-SLSIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Set-up modes configuration
76
PEULCK
PELCK
Mode
Name
PGMC
PGML
PGMV
PGMS
CERR
PGXC
PGXL
RXAF
TMS
VSB
T89C51RD2
Mode
Program or Erase Lock.
Disable the Erasure or Programming access
Program or Erase UnLock.
Enable the Erasure or Programming access
Write Code Data (byte)
or write Page
Always precedeed by PGML
Memory Page Load
(up to 128 bytes)
Read Code Data (byte)
Read Security Byte (=HSB)
Write Security Byte (Note 3)
(security byte = HSB)
Chip Erase User + XAF
Write Byte or Page in Extra Memory (XAF)
Always precedeed by PGXL
Memory Page Load XAF
(up to 128 bytes)
Read Signature bytes
30h (Manufacturer code)
31h (Device ID #1)
60h (Device ID #2)
61h (Device ID #3)
Read Extra Memory (XAF)
Control and program signals must be held at the levels indicated in the two following
tables.
Rst
1
1
1
1
1
1
1
1
1
1
1
1
Psen
0
0
0
0
0
0
0
0
0
0
0
0
Internally
Internally
100 ms
Note 2
Note 1
Note 1
10 ms
timed
timed
Ale
_ _
|_|
_ _
_ _
_ _
|_|
|_|
|_|
1
1
1
1
EA
1
1
1
1
1
1
1
1
1
1
1
1
P2.6
1
1
0
0
0
0
1
1
1
1
0
0
P2.7
_ _
_ _
_ _
_ _
|_|
|_|
|_|
|_|
0
0
1
1
1
0
1
1
P3.6
1
1
1
0
1
0
0
0
0
0
0
0
P3.7
4243G–8051–05/03
0
0
1
1
1
1
0
0
1
1
0
0
P0[7..0]
Dout =
55-AA
Dout
Dout
Dout
D7h
FCh
FFh
58h
Din
Din
Din
xx
xx
xx
xx
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