IC AVR MCU 8K LV 8MHZ COM 44TQFP

ATMEGA8535L-8AC

Manufacturer Part NumberATMEGA8535L-8AC
DescriptionIC AVR MCU 8K LV 8MHZ COM 44TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA8535L-8AC datasheets
 


Specifications of ATMEGA8535L-8AC

Core ProcessorAVRCore Size8-Bit
Speed8MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o32
Program Memory Size8KB (4K x 16)Program Memory TypeFLASH
Eeprom Size512 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature0°C ~ 70°C
Package / Case44-TQFP, 44-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Features
High-performance, Low-power AVR
Advanced RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
Nonvolatile Program and Data Memories
– 8K Bytes of In-System Self-Programmable Flash
Endurance: 10,000 Write/Erase Cycles
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
– 512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
– 512 Bytes Internal SRAM
– Programming Lock for Software Security
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels for TQFP Package Only
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x for TQFP
Package Only
– Byte-oriented Two-wire Serial Interface
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby
and Extended Standby
I/O and Packages
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF
Operating Voltages
– 2.7 - 5.5V for ATmega8535L
– 4.5 - 5.5V for ATmega8535
Speed Grades
– 0 - 8 MHz for ATmega8535L
– 0 - 16 MHz for ATmega8535
®
8-bit Microcontroller
Note: This is a summary document. A complete document
is available on our Web site at www.atmel.com.
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
ATmega8535
ATmega8535L
Summary
2502KS–AVR–10/06

ATMEGA8535L-8AC Summary of contents

  • Page 1

    ... PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF • Operating Voltages – 2.7 - 5.5V for ATmega8535L – 4.5 - 5.5V for ATmega8535 • Speed Grades – MHz for ATmega8535L – MHz for ATmega8535 ® 8-bit Microcontroller Note: This is a summary document. A complete document is available on our Web site at www.atmel.com. 8-bit ...

  • Page 2

    Pin Configurations Disclaimer ATmega8535(L) 2 Figure 1. Pinout ATmega8535 (XCK/T0) PB0 (T1) PB1 (INT2/AIN0) PB2 (OC0/AIN1) PB3 (SS) PB4 (MOSI) PB5 (MISO) PB6 (SCK) PB7 (RXD) PD0 (TXD) PD1 (INT0) PD2 (INT1) PD3 (OC1B) PD4 (OC1A) PD5 (ICP1) PD6 (MOSI) ...

  • Page 3

    Overview Block Diagram 2502KS–AVR–10/06 The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer ...

  • Page 4

    ... Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega8535 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications ...

  • Page 5

    Pin Descriptions V CC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) RESET XTAL1 XTAL2 AVCC AREF 2502KS–AVR–10/06 Digital supply voltage. Ground. Port A serves as the analog inputs to the A/D Converter. Port A ...

  • Page 6

    ... Resources ATmega8535( comprehensive set of development tools, application notes and datasheets are avail- able for download on http://www.atmel.com/avr. 2502KS–AVR–10/06 ...

  • Page 7

    About Code Examples 2502KS–AVR–10/06 This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation. Be aware that not all ...

  • Page 8

    Register Summary Address Name Bit 7 0x3F (0x5F) SREG I 0x3E (0x5E) SPH – 0x3D (0x5D) SPL SP7 0x3C (0x5C) OCR0 0x3B (0x5B) GICR INT1 0x3A (0x5A) GIFR INTF1 0x39 (0x59) TIMSK OCIE2 0x38 (0x58) TIFR OCF2 0x37 (0x57) SPMCR ...

  • Page 9

    Register Summary (Continued) Address Name Bit 7 0x00 (0x20) TWBR Notes: 1. Refer to the USART description for details on how to access UBRRH and UCSRC. 2. For compatibility with future devices, reserved bits should be written to zero if ...

  • Page 10

    Instruction Set Summary Mnemonics Operands Description ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

  • Page 11

    Mnemonics Operands Description MOV Rd, Rr Move Between Registers MOVW Rd, Rr Copy Register Word LDI Rd, K Load Immediate LD Rd, X Load Indirect LD Rd, X+ Load Indirect and Post-Inc Load Indirect and Pre-Dec. ...

  • Page 12

    Mnemonics Operands Description SLEEP Sleep WDR Watchdog Reset BREAK Break ATmega8535(L) 12 Operation Flags (see specific descr. for Sleep function) None (see specific descr. for WDR/Timer) None For On-chip Debug Only None #Clocks 1 1 N/A 2502KS–AVR–10/06 ...

  • Page 13

    ... Wide, Plastic Dual Inline Package (PDIP) 44J 44-lead, Plastic J-leaded Chip Carrier (PLCC) 44M1-A 44-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2502KS–AVR–10/06 Ordering Code Package ATmega8535L-8AC 44A ATmega8535L-8PC 40P6 ATmega8535L-8JC 44J ATmega8535L-8MC 44M1 ...

  • Page 14

    Packaging Information 44A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

  • Page 15

    A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). ...

  • Page 16

    X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 ...

  • Page 17

    Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. 2325 Orchard Parkway San Jose, CA 95131 R 2502KS–AVR–10/ Pin #1 Corner D2 Pin #1 ...

  • Page 18

    Errata ATmega8535 Rev. A and B ATmega8535(L) 18 The revision letter refer to the device revision. • First Analog Comparator conversion may be delayed • Asynchronous Oscillator does not stop in Power-down 1. First Analog Comparator conversion may be delayed ...

  • Page 19

    Datasheet Revision History Changes from Rev. 2502J- 08/06 to Rev. 2502K- 10/06 Changes from Rev. 2502I- 06/06 to Rev. 2502J- 08/06 Changes from Rev. 2502H- 04/06 to Rev. 2502I- 06/06 Changes from Rev. 2502G- 04/05 to Rev. 2502H- 04/06 Changes ...

  • Page 20

    Changes from Rev. 2502C-04/03 to Rev. 2502D-09/03 Changes from Rev. 2502B-09/02 to Rev. 2502C-04/03 ATmega8535( Removed “Advance Information” and some TBD’s from the datasheet. 2. Added note to “Pinout ATmega8535” on page 2. 3. Updated “Reset Characteristics” on ...

  • Page 21

    Changes from Rev. 2502A-06/02 to Rev. 2502B-09/02 2502KS–AVR–10/06 14. Updated “ADC Characteristics” on page 263. 14. Updated “Register Summary” on page 8. 15. Various Timer 1 corrections. 16. Added WD_FUSE period in Table 108 on page 253. 1. Canged the ...

  • Page 22

    ... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...