ATMEGA8535L-8AC Atmel, ATMEGA8535L-8AC Datasheet - Page 121

• Manufacturer Part Number: ATMEGA8535L-8AC
• Description: IC AVR MCU 8K LV 8MHZ COM 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Compare Match Output
Unit
Compare Output Mode and
Waveform Generation
2502K–AVR–10/06
Be aware that the COM21:0 bits are not double buffered together with the compare
value. Changing the COM21:0 bits will take effect immediately.
The Compare Output mode (COM21:0) bits have two functions. The Waveform Genera-
tor uses the COM21:0 bits for defining the Output Compare (OC2) state at the next
Compare Match. Also, the COM21:0 bits control the OC2 pin output source. Figure 56
shows a simplified schematic of the logic affected by the COM21:0 bit setting. The I/O
Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the
general I/O port control registers (DDR and PORT) that are affected by the COM21:0
bits are shown. When referring to the OC2 state, the reference is for the internal OC2
Register, not the OC2 pin.
Figure 56. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2) from the
waveform generator if either of the COM21:0 bits are set. However, the OC2 pin direc-
tion (input or output) is still controlled by the Data Direction Register (DDR) for the port
pin. The Data Direction Register bit for the OC2 pin (DDR_OC2) must be set as output
before the OC2 value is visible on the pin. The port override function is independent of
the Waveform Generation mode.
The design of the output compare pin logic allows initialization of the OC2 state before
the output is enabled. Note that some COM21:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 128.
The Waveform Generator uses the COM21:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM21:0 = 0 tells the waveform generator that no
action on the OC2 Register is to be performed on the next Compare Match. For com-
pare output actions in the non-PWM modes refer to Table 52 on page 129. For fast
PWM mode, refer to Table 53 on page 129, and for phase correct PWM refer to Table
54 on page 130.
COMn1
COMn0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCn
Q
Q
Q
ATmega8535(L)
1
0
OCn
Pin
121