ATMEGA88-20MJ Atmel, ATMEGA88-20MJ Datasheet - Page 34

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ATMEGA88-20MJ

Manufacturer Part Number
ATMEGA88-20MJ
Description
IC MCU AVR 8K 5V 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MJ

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA88-24MJ
ATMEGA88-24MJ
8.8
8.9
34
External Clock
Clock Output Buffer
ATmega48/88/168
To drive the device from an external clock source, XTAL1 should be driven as shown in
8-4 on page
to “0000” (see
Table 8-12.
Figure 8-4.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 8-13.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
35
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
8-13.
34. To run the device on an external clock, the CKSEL Fuses must be programmed
Table
Crystal Oscillator Clock Frequency
External Clock Drive Configuration
Start-up Times for the External Clock Selection
8-12).
Frequency
0 - 20 MHz
EXTERNAL
NC / PB7
SIGNAL
CLOCK
Start-up Time from Power-
down and Power-save
Reserved
6 CK
6 CK
6 CK
XTAL2
XTAL1
GND
Additional Delay from
“System Clock Prescaler” on page
Reset (V
14CK + 4.1 ms
14CK + 65 ms
14CK
CC
CKSEL3..0
= 5.0V)
0000
2545S–AVR–07/10
SUT1..0
00
01
10
11
Figure

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