ATMEGA3250V-8AI Atmel, ATMEGA3250V-8AI Datasheet

IC AVR MCU 32K 8MHZ 100TQFP

ATMEGA3250V-8AI

Manufacturer Part Number
ATMEGA3250V-8AI
Description
IC AVR MCU 32K 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA3250V-8AI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA3250V-8AI
Manufacturer:
Atmel
Quantity:
10 000
Features
High Performance, Low Power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Speed Grade:
Temperature range:
Ultra-Low Power Consumption
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
– In-System Self-programmable Flash Program Memory
– EEPROM
– Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
– 53/68 Programmable I/O Lines
– 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP
– ATmega325V/ATmega3250V/ATmega645V/ATmega6450V:
– Atmel ATmega325/3250/645/6450:
– -40°C to 85°C Industrial
– Active Mode:
– Power-down Mode:
Mode
Standby
• 32KBytes (ATmega325/ATmega3250)
• 64KBytes (ATmega645/ATmega6450)
• 1Kbytes (ATmega325/ATmega3250)
• 2Kbytes (ATmega645/ATmega6450)
• 2Kbytes (ATmega325/ATmega3250)
• 4Kbytes (ATmega645/ATmega6450)
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
• 0 - 4MHz @ 1.8 - 5.5V, 0 - 8MHz @ 2.7 - 5.5V
• 0 - 8MHz @ 2.7 - 5.5V, 0 - 16MHz @ 4.5 - 5.5V
1MHz, 1.8V: 350µA
32kHz, 1.8V: 20µA (including Oscillator)
100nA at 1.8V
®
AVR
®
8-Bit Microcontroller
(1)
8-bit Atmel
Microcontroller
with In-System
Programmable
Flash
ATmega325/V
ATmega3250/V
ATmega645/V
ATmega6450/V
Summary
2570MS–AVR–04/11

Related parts for ATMEGA3250V-8AI

ATMEGA3250V-8AI Summary of contents

Page 1

... I/O and Packages – 53/68 Programmable I/O Lines – 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP • Speed Grade: – ATmega325V/ATmega3250V/ATmega645V/ATmega6450V: • 4MHz @ 1.8 - 5.5V 8MHz @ 2.7 - 5.5V – Atmel ATmega325/3250/645/6450: • 8MHz @ 2.7 - 5.5V 16MHz @ 4.5 - 5.5V • Temperature range: – ...

Page 2

Pin Configurations Figure 1-1. Pinout ATmega3250/6450 1 DNC 2 (RXD/PCINT0) PE0 3 (TXD/PCINT1) PE1 4 (XCK/AIN0/PCINT2) PE2 (AIN1/PCINT3) PE3 5 6 (USCK/SCL/PCINT4) PE4 7 (DI/SDA/PCINT5) PE5 8 (DO/PCINT6) PE6 9 (CLKO/PCINT7) PE7 10 VCC 11 GND 12 DNC (PCINT24) ...

Page 3

Figure 1-2. Pinout ATmega325/645 DNC 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) ...

Page 4

... DATA REGISTER PORTE The Atmel AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two inde- pendent registers to be accessed in one single instruction executed in one clock cycle. The 2570MS– ...

Page 5

... Self-Programmable Flash on a monolithic chip, the Atmel Atmel ATmega325/3250/645/6450 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The Atmel ATmega325/3250/645/6450 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ...

Page 6

Pin Descriptions The following section describes the I/O-pin special functions. 2.3 Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7..PA0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ...

Page 7

...

Page 8

... AREF This is the analog reference pin for the A/D Converter. 3. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85° ...

Page 9

Register Summary Note: Address Name Bit 7 Reserved - (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - ...

Page 10

Address Name Bit 7 Reserved - (0xC3) UCSR0C - (0xC2) UCSR0B RXCIE0 (0xC1) UCSR0A RXC0 (0xC0) Reserved - (0xBF) Reserved - (0xBE) Reserved - (0xBD) Reserved - (0xBC) Reserved - (0xBB) USIDR (0xBA) USISR USISIF (0xB9) USICR USISIE (0xB8) Reserved ...

Page 11

Address Name Bit 7 TCNT1L (0x84) Reserved - (0x83) TCCR1C FOC1A (0x82) TCCR1B ICNC1 (0x81) TCCR1A COM1A1 (0x80) DIDR1 - (0x7F) DIDR0 ADC7D (0x7E) Reserved - (0x7D) ADMUX REFS1 (0x7C) ADCSRB - (0x7B) ADCSRA ADEN (0x7A) ADCH (0x79) ADCL (0x78) ...

Page 12

... When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel ATmega325/3250/645/6450 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...

Page 13

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 14

Mnemonics Operands BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST ...

Page 15

Mnemonics Operands IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2570MS–AVR–04/11 ATmega325/3250/645/6450 Description ...

Page 16

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive). Also Halide free and fully Green. ...

Page 17

... Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570MS–AVR–04/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega3250V-8AU 100A (4) ATmega3250V-8AUR 100A ATmega3250-16AU 100A (4) ATmega3250-16AUR 100A and Figure 27-2 on page 299. Package Type ...

Page 18

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive). Also Halide free and fully Green. ...

Page 19

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive). Also Halide free and fully Green. ...

Page 20

Packaging Information 8.1 64A PIN 0°~7° Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

Page 21

Marked Pin TOP VIEW BOTTOM VIEW Notes: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 R ...

Page 22

PIN 0°~7° L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 ...

Page 23

Errata 9.1 Errata ATmega325 The revision letter in this section refers to the revision of the ATmega325 device. 9.1.1 ATmega325 Rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may ...

Page 24

ATmega3250 Rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer ...

Page 25

... Updated “Ordering Information” on page 343 devices. Removed “AI” and “MI” devices. Updated “Errata” on page 350. Updated the datasheet according to the Atmel new drand style guide, including the last page. Updated “Features” on page 1. Added “Data Retention” on page 9 Updated “ ...

Page 26

... ACBG: Analog Comparator Bandgap Select” on page Updated Features in “Analog to Digital Converter” on page Updated “Prescaling and Conversion Timing” on page Updated “Atmel ATmega325/3250/645/6450 Boot Loader Parameters” on page 262. Updated “DC Characteristics” on page MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package QFN/MLF”. ...

Page 27

Rev. 2570C – 11/ 10.12 Rev. 2570B – 09/04 1. 10.13 Rev. 2570A – 09/04 1. 2570MS–AVR–04/11 Updated Figure 22-9 on page 209 Updated algorithm “Enter Programming ...

Page 28

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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