ATMEGA88PA-MU Atmel, ATMEGA88PA-MU Datasheet - Page 275

MCU AVR 8K ISP FLASH MEM 32-QFN

ATMEGA88PA-MU

Manufacturer Part Number
ATMEGA88PA-MU
Description
MCU AVR 8K ISP FLASH MEM 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88PA-MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
32QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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25.2.5
8271C–AVR–08/10
Simple Assembly Code Example for a Boot Loader
Note that the RWWSB bit will always be read as zero in ATmega 48A/48PA. Nevertheless, it is
recommended to check this bit as shown in the code example, to ensure compatibility with
devices supporting Read-While-Write.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
.equ PAGESIZEB = PAGESIZE*2
.org SMALLBOOTSTART
Write_page:
Wrloop:
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
; Page Erase
ldi
rcallDo_spm
; re-enable the RWW section
ldi
rcallDo_spm
; transfer data from RAM to Flash page buffer
ldi
ldi
ld
ld
ldi
rcallDo_spm
adiw ZH:ZL, 2
sbiw loophi:looplo, 2
brne Wrloop
; execute Page Write
subi ZL, low(PAGESIZEB)
sbci ZH, high(PAGESIZEB)
ldi
rcallDo_spm
; re-enable the RWW section
ldi
rcallDo_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
spmcrval, (1<<PGERS) | (1<<SELFPRGEN)
spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Y+
r1, Y+
spmcrval, (1<<SELFPRGEN)
spmcrval, (1<<PGWRT) | (1<<SELFPRGEN)
spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
;PAGESIZEB is page size in BYTES, not words
;init loop variable
;not required for PAGESIZEB<=256
;use subi for PAGESIZEB<=256
;restore pointer
;not required for PAGESIZEB<=256
;init loop variable
;not required for PAGESIZEB<=256
;restore pointer
275

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