ATMEGA88PA-MU Atmel, ATMEGA88PA-MU Datasheet - Page 94

• Manufacturer Part Number: ATMEGA88PA-MU
• Description: MCU AVR 8K ISP FLASH MEM 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA88PA-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 23
• Interface Type: SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.4.8
13.4.9
13.4.10
8271C–AVR–08/10
PORTD – The Port D Data Register
DDRD – The Port D Data Direction Register
PIND – The Port D Input Pins Address
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Bit
0x0B (0x2B)
Read/Write
Initial Value
Bit
0x0A (0x2A)
Read/Write
Initial Value
Bit
0x09 (0x29)
Read/Write
Initial Value
PORTD7
PIND7
DDD7
R/W
R/W
N/A
R
7
0
7
0
7
PORTD6
PIND6
DDD6
R/W
R/W
N/A
R
6
0
6
0
6
PORTD5
PIND5
DDD5
R/W
R/W
N/A
R
5
0
5
0
5
PORTD4
PIND4
DDD4
R/W
R/W
N/A
R
4
0
4
0
4
PORTD3
PIND3
DDD3
R/W
R/W
N/A
R
3
0
3
0
3
PORTD2
PIND2
DDD2
R/W
R/W
N/A
R
2
0
2
0
2
PORTD1
PIND1
DDD1
R/W
R/W
N/A
R
1
0
1
0
1
PORTD0
PIND0
DDD0
R/W
R/W
N/A
R
0
0
0
0
0
PORTD
DDRD
PIND
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