ATMEGA328P-PU Atmel, ATMEGA328P-PU Datasheet - Page 308

MCU AVR 32K FLASH 28-PDIP

ATMEGA328P-PU

Manufacturer Part Number
ATMEGA328P-PU
Description
MCU AVR 32K FLASH 28-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Data Rom Size
1 KB
A/d Bit Size
10 bit
A/d Channels Available
6
Height
4.57 mm
Length
34.8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
7.49 mm
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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27.7.6
27.7.7
27.7.8
27.7.9
8271C–AVR–08/10
Reading the Flash
Reading the EEPROM
Programming the Fuse Low Bits
Programming the Fuse High Bits
Figure 27-4. Programming the EEPROM Waveforms
The algorithm for reading the Flash memory is as follows (refer to
page 305
1. A: Load Command “0000 0010”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.
5. Set BS1 to “1”. The Flash word high byte can now be read at DATA.
6. Set OE to “1”.
The algorithm for reading the EEPROM memory is as follows (refer to
on page 305
1. A: Load Command “0000 0011”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. Set OE to “0”, and BS1 to “0”. The EEPROM Data byte can now be read at DATA.
5. Set OE to “1”.
The algorithm for programming the Fuse Low bits is as follows (refer to
on page 305
1. A: Load Command “0100 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
3. Give WR a negative pulse and wait for RDY/BSY to go high.
The algorithm for programming the Fuse High bits is as follows (refer to
Flash” on page 305
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
RESET +12V
RDY/BSY
PAGEL
XTAL1
DATA
XA1
XA0
BS1
BS2
WR
OE
for details on Command and Address loading):
for details on Command and Address loading):
for details on Command and Data loading):
0x11
A
for details on Command and Data loading):
ADDR. HIGH
G
ADDR. LOW
B
DATA
C
XX
E
ADDR. LOW
B
DATA
C
K
XX
E
”Programming the Flash” on
”Programming the Flash”
”Programming the Flash”
L
”Programming the
308

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