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CY8C26443-24SI
CY8C26443-24SI | |
|---|---|
| Manufacturer Part Number | CY8C26443-24SI |
| Description | IC MCU 16K FLASH 256B 28-SOIC |
| Manufacturer | Cypress Semiconductor Corp |
| Series | PSOC™ CY8C26xxx |
| CY8C26443-24SI datasheets |
|
Availability: In stock
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Warranty: 60 days
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Specifications of CY8C26443-24SI | |||
|---|---|---|---|
| Core Processor | M8C | Core Size | 8-Bit |
| Speed | 24MHz | Connectivity | SPI, UART/USART |
| Peripherals | LVD, POR, PWM, WDT | Number Of I /o | 24 |
| Program Memory Size | 16KB (16K x 8) | Program Memory Type | FLASH |
| Ram Size | 256 x 8 | Voltage - Supply (vcc/vdd) | 3 V ~ 5.25 V |
| Data Converters | A/D 1x8b, 1x11b, 1x12b; D/A 1x9b | Oscillator Type | Internal |
| Operating Temperature | -40°C ~ 85°C | Package / Case | 28-SOIC (7.5mm Width) |
| Lead Free Status / RoHS Status | Contains lead / RoHS non-compliant | Eeprom Size | - |
| Other names | 428-1430 428-1430-5 428-1430 | ||
PrevNext
13.2.6
DC Analog Reference Specifications
The following table lists guaranteed maximum and mini-
mum specifications for the voltage and temperature
ranges, 5V +/- 5% and -40°C <= TA <= 85°C. The guar-
anteed specifications are measured through the Analog
Continuous Time PSoC blocks. The bias levels for
AGND refer to the bias of the Analog Continuous Time
PSoC block. The bias levels for RefHi and RefLo refer to
Table 111:
5V DC Analog Reference Specifications
Symbol
5V DC Analog Reference Specifications
1
AGND = Vcc/2
CT Block Bias = High
1
AGND = 2*BandGap
CT Block Bias = High
AGND = P2[4] (P2[4] = Vcc/2)
CT Block Bias = High
AGND Column to Column Variation (AGND=Vcc/
1
2)
CT Block Bias = High
REFHI = Vcc/2 + BandGap
Ref Control Bias = High
REFHI = 3*BandGap
Ref Control Bias = High
REFHI = 2*BandGap + P2[6] (P2[6] = 1.3V)
Ref Control Bias = High
REFHI = P2[4] + BandGap (P2[4] = Vcc/2)
Ref Control Bias = High
REFHI = P2[4] + P2[6] (P2[4] = Vcc/2, P2[6] =
1.3V)
Ref Control Bias = High
REFLO = Vcc/2 – BandGap
Ref Control Bias = High
REFLO = BandGap
Ref Control Bias = High
REFLO = 2*BandGap - P2[6] (P2[6] = 1.3V)
Ref Control Bias = High
REFLO = P2[4] – BandGap (P2[4] = Vcc/2)
Ref Control Bias = High
REFLO = P2[4]-P2[6] (P2[4] = Vcc/2, P2[6] =
1.3V)
Ref Control Bias = High
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
the Analog Reference Control Register. The limits stated
for AGND include the offset error of the AGND buffer
local to the Analog Continuous Time PSoC block. Typical
parameters apply to 5V at 25C and are for design guid-
ance only. (3.3V replaces 5V for the 3.3V DC Analog
Reference Specifications.)
Minimum
V
/2 - 0.010
cc
2*BG - 0.043
1
P24 - 0.013
-0.034
V
cc /2+BG - 0.140
3*BG - 0.112
2*BG+P2[6] -
0.113
P2[4]+BG -
0.130
P2[4]+P2[6] -
0.133
V
cc /2-BG - 0.051
BG - 0.082
2*BG-P2[6] -
0.084
P2[4]-BG -
0.056
P2[4]-P2[6] -
0.057
DC and AC Characteristics
Typical
Maximum
Unit
V
/2 - 0.004
V
/2 + 0.003
V
cc
cc
2*BG - 0.010
2*BG + 0.024
V
P24 0.001
P24 + 0.014
V
0.000
0.034
mV
V
cc /2+BG +
V
cc /2+BG - 0.018
V
0.103
3*BG - 0.018
3*BG + 0.076
V
2*BG+P2[6] -
2*BG+P2[6]+
V
0.018
0.077
P2[4]+BG -
P2[4]+BG +
V
0.016
0.098
P2[4]+P2[6] -
P2[4]+P2[6]+
V
0.016
0.100
V
+
V
V
cc /2-BG
0.024
cc /2-BG + 0.098
BG + 0.023
BG + 0.129
V
2*BG-P2[6] +
2*BG-P2[6] +
V
0.025
0.134
P2[4]-BG +
P2[4]-BG +
V
0.026
0.107
P24-P26 +
P2[4]-P2[6] +
V
0.026
0.110
133
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