MC68HC705C8ACP Freescale Semiconductor, MC68HC705C8ACP Datasheet - Page 46

IC MCU 4MHZ 8K OTP 40-DIP

MC68HC705C8ACP

Manufacturer Part Number
MC68HC705C8ACP
Description
IC MCU 4MHZ 8K OTP 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACP

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C8ACP
Manufacturer:
MOTOROLA
Quantity:
13
Part Number:
MC68HC705C8ACP
Manufacturer:
FREESCALE
Quantity:
1 487
Part Number:
MC68HC705C8ACPE
Manufacturer:
ON
Quantity:
1 000
Central Processor Unit (CPU)
3.3.3 Stack Pointer
3.3.4 Program Counter
Technical Data
46
Reset:
Read:
Write:
Reset:
Read:
Write:
Bit 12
Bit 12
0
0
The stack pointer (SP) shown in
contains the address of the next free location on the stack. During a reset
or after the reset stack pointer (RSP) instruction, the stack pointer
initializes to $00FF. The address in the stack pointer decrements as data
is pushed onto the stack and increments as data is pulled from the stack.
The seven most significant bits of the stack pointer are fixed
permanently at 0000011, so the stack pointer produces addresses from
$00C0 to $00FF. If subroutines and interrupts use more than 64 stack
locations, the stack pointer wraps around to address $00FF and begins
writing over the previously stored data. A subroutine uses two stack
locations. An interrupt uses five locations.
The program counter (PC) shown in
contains the address of the next instruction or operand to be fetched.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
Freescale Semiconductor, Inc.
= Unimplemented
11
11
0
0
For More Information On This Product,
10
10
0
0
Central Processor Unit (CPU)
Figure 3-5. Program Counter (PC)
Go to: www.freescale.com
9
9
0
0
Loaded with reset vector from $1FFE and $1FFF
Figure 3-4. Stack Pointer (SP)
8
0
0
8
7
7
1
1
Figure 3-4
6
1
1
6
Figure 3-5
5
1
5
is a 13-bit register that
4
1
4
is a 13-bit register that
MC68HC705C8A — Rev. 3
3
1
3
2
1
2
MOTOROLA
1
1
1
Bit 0
Bit 0
1

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