MC68HC705C8ACP Freescale Semiconductor, MC68HC705C8ACP Datasheet - Page 62

IC MCU 4MHZ 8K OTP 40-DIP

MC68HC705C8ACP

Manufacturer Part Number
MC68HC705C8ACP
Description
IC MCU 4MHZ 8K OTP 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACP

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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Resets
5.3.1 Power-On Reset (POR)
5.3.2 External Reset
5.3.3 Programmable and Non-Programmable COP Watchdog Resets
Technical Data
62
A positive transition on the V
The POR is strictly for the power-up condition and cannot be used to
detect drops in power supply voltage.
A 4064 t
active allows the clock generator to stabilize. If the RESET pin is at
logic 0 at the end of 4064 t
until the signal on the RESET pin goes to logic 1.
The minimum time required for the MCU to recognize a reset is 1 1/2
t
as an external reset and not as a COP or clock monitor reset, the RESET
pin must be low for eight t
is sampled. If the pin is still low, an external reset has occurred. If the
input is high, then the MCU assumes that the reset was initiated
internally by either the COP watchdog timer or by the clock monitor. This
method of differentiating between external and internal reset conditions
assumes that the RESET pin will rise to a logic 1 less than two t
its release and that an externally generated reset should stay active for
at least eight t
A timeout of a COP watchdog generates a COP reset. A COP watchdog,
once enabled, is part of a software error detection system and must be
cleared periodically to start a new timeout period.
The MC68HC705C8A has two different COP watchdogs for compatibility
with devices such as the MC68HC705C8 and the MC68HC05C4A:
One COP has four programmable timeout periods and the other has a
fixed non-programmable timeout period.
CYC
1. Programmable COP watchdog reset
2. Non-programmable COP watchdog
Freescale Semiconductor, Inc.
. However, to guarantee that the MCU recognizes an external reset
For More Information On This Product,
CYC
Go to: www.freescale.com
(internal clock cycle) delay after the oscillator becomes
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.
Resets
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DD
. After six t
, the MCU remains in the reset condition
pin generates a power-on reset (POR).
CYC
, the input on the RESET pin
MC68HC705C8A — Rev. 3
MOTOROLA
CYC
after

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