MC68HC705KJ1CDW Freescale Semiconductor, MC68HC705KJ1CDW Datasheet - Page 23

• Manufacturer Part Number: MC68HC705KJ1CDW
• Description: IC MCU 4MHZ 1.2K OTP 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705KJ1CDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 10
• Program Memory Size: 1.2KB (1.2K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

2.5 Input/Output Register Summary
Freescale Semiconductor
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
Addr.
IRQ Status and Control Reg-
Data Direction Register A
Data Direction Register B
Timer Status and Control
Timer Counter Register
Register Name
Port A Data Register
Port B Data Register
Register (TSCR)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
See page 64.
See page 66.
See page 64.
See page 67.
See page 81.
See page 82.
See page 54.
ister (ISCR)
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
(PORTA)
(PORTB)
(DDRA)
(DDRB)
(TCR)
Figure 2-2. I/O Register Summary (Sheet 1 of 2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
DDRA7
TCR7
IRQE
Bit 7
TOF
PA7
0
0
0
0
0
0
1
= Unimplemented
DDRA6
TCR6
RTIF
PA6
6
0
0
0
0
0
0
0
0
Refer to
Refer to
DDRA5
lel I/O Ports (PORTS)
lel I/O Ports (PORTS)
TCR5
TOIE
PA5
5
0
0
0
0
0
0
Chapter 7 Paral-
Chapter 7 Paral-
R = Reserved
DDRA4
Unaffected by reset
Unaffected by reset
TCR4
RTIE
PA4
R
4
0
0
0
0
0
0
DDRA3
DDRB3
TOFR
TCR3
IRQF
PA3
PB3
3
0
0
0
0
0
0
Input/Output Register Summary
U = Unaffected
DDRA2
DDRB2
RTIFR
TCR2
PA2
PB2
2
0
0
0
0
0
0
0
Refer to
Refer to
DDRA1
lel I/O Ports (PORTS)
lel I/O Ports (PORTS)
TCR1
IRQR
PA1
RT1
1
0
0
1
0
0
0
Chapter 7 Paral-
Chapter 7 Paral-
DDRA0
TCR0
Bit 0
PA0
RT0
0
0
1
0
0
0
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