MC68HC705KJ1CDW Freescale Semiconductor, MC68HC705KJ1CDW Datasheet - Page 79

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MC68HC705KJ1CDW

Manufacturer Part Number
MC68HC705KJ1CDW
Description
IC MCU 4MHZ 1.2K OTP 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705KJ1CDW

Core Processor
HC05
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
10
Program Memory Size
1.2KB (1.2K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705KJ1CDW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Chapter 9
Multifunction Timer Module
9.1 Introduction
The multifunction timer provides a timing reference with programmable real-time interrupt capability.
Figure 9-2
9.2 Features
Features of the multifunction timer include:
9.3 Operation
A 15-stage ripple counter, preceded by a prescaler that divides the internal clock signal by four, provides
the timing reference for the timer functions. The value of the first eight timer stages can be read at any
time by accessing the timer counter register at address $0009. A timer overflow function at the eighth
stage allows a timer interrupt every 1024 internal clock cycles.
The next four stages lead to the real-time interrupt (RTI) circuit. The RT1 and RT0 bits in the timer status
and control register at address $0008 allow a timer interrupt every 16,384, 32,768, 65,536, or 131,072
clock cycles. The last four stages drive the selectable COP system. For information on the COP, refer to
Chapter 3 Computer Operating Properly Module
Freescale Semiconductor
$0008
$0009
Addr.
Timer Status and Control Register
Timer overflow
Four selectable interrupt rates
Computer operating properly (COP) watchdog timer
shows the timer organization.
Register Name
Timer Counter Register
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
See page 81.
See page 82.
(TSCR)
(TCR)
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 9-1. I/O Register Summary
TMR7
Bit 7
TOF
0
0
= Unimplemented
TMR6
RTIF
6
0
0
(COP).
TMR5
TOIE
5
0
0
TMR4
RTIE
4
0
0
TOFR
TMR3
3
0
0
0
RTIFR
TMR2
2
0
0
0
TMR1
RT1
1
1
0
TMR0
Bit 0
RT0
1
0
79

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