MC68HC705KJ1CDW Freescale Semiconductor, MC68HC705KJ1CDW Datasheet - Page 81

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MC68HC705KJ1CDW

Manufacturer Part Number
MC68HC705KJ1CDW
Description
IC MCU 4MHZ 1.2K OTP 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705KJ1CDW

Core Processor
HC05
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
10
Program Memory Size
1.2KB (1.2K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705KJ1CDW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
9.5 I/O Registers
The following registers control and monitor the timer operation:
9.5.1 Timer Status and Control Register
The read/write timer status and control register performs the following functions:
TOF — Timer Overflow Flag
RTIF — Real-Time Interrupt Flag
TOIE — Timer Overflow Interrupt Enable Bit
RTIE — Real-Time Interrupt Enable Bit
TOFR — Timer Overflow Flag Reset Bit
RTIFR — Real-Time Interrupt Flag Reset Bit
Freescale Semiconductor
This read-only flag becomes set when the first eight stages of the counter roll over from $FF to $00.
TOF generates a timer overflow interrupt request if TOIE is also set. Clear TOF by writing a logic 1 to
the TOFR bit. Writing to TOF has no effect. Reset clears TOF.
This read-only flag becomes set when the selected RTI output becomes active. RTIF generates a
real-time interrupt request if RTIE is also set. Clear RTIF by writing a logic 1 to the RTIFR bit. Writing
to RTIF has no effect. Reset clears RTIF.
This read/write bit enables timer overflow interrupts. Reset clears TOIE.
This read/write bit enables real-time interrupts. Reset clears RTIE.
Writing a logic 1 to this write-only bit clears the TOF bit. TOFR always reads as logic 0. Reset clears
TOFR.
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR always reads as logic 0. Reset clears
RTIFR.
1 = Timer overflow interrupts enabled
0 = Timer overflow interrupts disabled
1 = Real-time interrupts enabled
0 = Real-time interrupts disabled
Timer status and control register (TSCR)
Timer counter register (TCR)
Flags timer interrupts
Enables timer interrupts
Resets timer interrupt flags
Selects real-time interrupt rates
Address:
Reset:
Read:
Write:
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
$0008
Figure 9-3. Timer Status and Control Register (TSCR)
Bit 7
TOF
0
= Unimplemented
RTIF
6
0
TOIE
5
0
RTIE
4
0
TOFR
3
0
0
RTIFR
2
0
0
RT1
1
1
Bit 0
RT0
1
I/O Registers
81

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