MC68HC705B16CFN

Manufacturer Part NumberMC68HC705B16CFN
DescriptionIC MCU 2.1MHZ 15K OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC05
MC68HC705B16CFN datasheet
 

Specifications of MC68HC705B16CFN

Core ProcessorHC05Core Size8-Bit
Speed2.1MHzConnectivitySCI
PeripheralsPOR, WDTNumber Of I /o32
Program Memory Size15KB (15K x 8)Program Memory TypeOTP
Eeprom Size256 x 8Ram Size352 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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1 (set)
The watchdog will be active during WAIT mode.
0 (clear) –
The watchdog system will be disabled during WAIT mode.
PBPD – Port B pull-down resistors
1 (set)
Pull-down resistors are connected to all 8 pins of port B; the
pull-down, R
0 (clear) –
No pull-down resistors are connected.
PCPD — Port C pull-down resistors
1 (set)
Pull-down resistors are connected to all 8 pins of port C; the
pull-down, R
0 (clear) –
No pull-down resistors are connected.
The combination of bit 0 and bit 1 allows the option of pull-down resistors on 0, 8 or 16 inputs. This
feature is not available on the MC68HC05B6.
C.5
Bootstrap mode
The 432 bytes of self-check firmware on the MC68HC05B6 are replaced with 496 bytes of
bootstrap firmware. The bootstrap firmware located from $0200 to $02FF and $1F00 to $1FEF
can be used to program the EPROM, to check if the EPROM is erased and to load and execute
data in RAM.
When the MC68HC705B5 is placed in the bootstrap mode, the bootstrap reset vector is fetched
and the bootstrap firmware starts to execute.
each level of bootstrap mode on the rising edge of RESET. The hold time on the IRQ and TCAP1
pins after the external RESET pin is brought high is two clock cycles.
IRQ pin
TCAP1 pin
V
to V
V
SS
DD
SS
+ 9 Volts
V
+ 9 Volts
V
+ 9 Volts
V
+ 9 Volts
V
x = Don’t care
14
Freescale
C-8
, is active only while the pin is an input.
PD
, is active only while the pin is an input.
PD
Table C-2
Table C-2 Mode of operation selection
PD2
PD3
PD4
to V
x
x
x
Single chip
DD
0
1
0
Erased EPROM verification
DD
x
0
0
EPROM parallel bootstrap load
DD
x
1
1
EPROM (RAM) serial bootstrap load and execute
DD
x
0
1
RAM parallel bootstrap load and execute
DD
MC68HC705B5
shows the conditions required to enter
Mode
MC68HC05B6
Rev. 4.1