MC68HC705B16CFN

Manufacturer Part NumberMC68HC705B16CFN
DescriptionIC MCU 2.1MHZ 15K OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC05
MC68HC705B16CFN datasheet
 


Specifications of MC68HC705B16CFN

Core ProcessorHC05Core Size8-Bit
Speed2.1MHzConnectivitySCI
PeripheralsPOR, WDTNumber Of I /o32
Program Memory Size15KB (15K x 8)Program Memory TypeOTP
Eeprom Size256 x 8Ram Size352 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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H.4.1
EPROM read operation
The execution of a program in the EPROM address range or a load from the EPROM are both
read operations. The E6LAT bit in the EPROM/EEPROM control register should be cleared to ‘0’
which automatically resets the E6PGM bit. In this way the EPROM is read like a normal ROM.
Reading the EPROM with the E6LAT bit set will give data that does not correspond to the actual
memory content. As interrupt vectors are in EPROM, they will not be loaded when E6LAT is set.
Similarly, the bootstrap ROM routines cannot be executed when E6LAT is set. In read mode, the
VPP6 pin must be at the V
set to the read mode.
Note:
An erased byte reads as $00.
H.4.2
EPROM program operation
Typically, the EPROM will be programmed by the bootstrap routines resident in the on-chip ROM.
However, the user program can be used to program some EPROM locations if the proper
procedure is followed. In particular, the programming sequence must be running in RAM, as the
EPROM will not be available for code execution while the E6LAT bit is set. The V
must occur externally after EPGM is set, for example under control of a signal generated on a pin
by the programming routine.
Note:
Unless the part has a window for reprogramming, only the cumulative programming of
bits to logic ‘1’ is possible if multiple programming is made on the same byte.
To allow simultaneous programming of up to sixteen bytes, these bytes must be in the same group
of addresses which share the same most significant address bits; only the four LSBs can change.
H.4.3
EPROM/EEPROM control register
EPROM/EEPROM/ECLK control
14
Freescale
H-8
level. When entering the STOP mode, the EPROM is automatically
DD
Address
bit 7
bit 6
bit 5
bit 4
$0007
0
E6LAT E6PGM ECLK E1ERA E1LAT E1PGM u000 0000
MC68HC705B32
switching
PP6
State
bit 3
bit 2
bit 1
bit 0
on reset
MC68HC05B6
Rev. 4.1