MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 54

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data direction
register bit
Latched data
register bit
4
Table 4-1
shows the effect of reading from or writing to an I/O pin in various circumstances. Note
that the read/write signal shown is internal and not available to the user.
R/W
DDRn
0
0
0
1
1
0
1
1
4.2
Ports A and B
These ports are standard M68HC05 bidirectional I/O ports, each comprising a data register and
a data direction register.
Reset does not affect the state of the data register, but clears the data direction register, thereby
returning all port pins to input mode. Writing a ‘1’ to any DDR bit sets the corresponding port pin
to output mode.
Freescale
4-2
DDRn
DATA
Output
buffer
O/P
data
buffer
Input
buffer
Figure 4-1 Standard I/O port structure
Table 4-1 I/O pin states
Action of MCU write to/read of data bit
The I/O pin is in input mode. Data is written into the output data latch.
Data is written into the output data latch, and output to the I/O pin.
The state of the I/O pin is read.
The I/O pin is in output mode. The output data latch is read.
INPUT/OUTPUT PORTS
I/O
Pin
DDRn
DATA
I/O Pin
1
0
0
Output
1
1
1
0
0
tristate
Input
0
1
tristate
MC68HC05B6
Rev. 4.1

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