MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 56

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
a digital read of port D with levels other than V
power dissipation during the read cycle.
As port D is an input-only port there is no DDR associated with it. Also, at power up or external
reset, the A/D converter is disabled, thus the port is configured as a standard input-only port.
Note:
It is recommended that all unused input ports and I/O ports be tied to an appropriate
logic level (i.e. either V
4
4.5
Port registers
The following sections explain in detail the individual bits in the data and control registers
associated with the ports.
4.5.1
Port data registers A and B (PORTA and PORTB)
Port A data (PORTA)
Port B data (PORTB)
Each bit can be configured as input or output via the corresponding data direction bit in the port
data direction register (DDRx).
The state of the port data registers following reset is not defined.
4.5.2
Port data register C (PORTC)
Port C data (PORTC)
Each bit can be configured as input or output via the corresponding data direction bit in the port
data direction register (DDRx).
In addition, bit 2 of port C is used to output the CPU clock if the ECLK bit in the EEPROM
CTL/ECLK register is set (see
The state of the port data registers following reset is not defined.
Freescale
4-4
or V
on the port D pins will result in greater
DD
SS
or V
).
DD
SS
Address
bit 7
bit 6
bit 5
bit 4
$0000
$0001
Address
bit 7
bit 6
bit 5
bit 4
$0002
Section
4.3).
INPUT/OUTPUT PORTS
State
bit 3
bit 2
bit 1
bit 0
on reset
Undefined
Undefined
State
bit 3
bit 2
bit 1
bit 0
on reset
PC2/
Undefined
ECLK
MC68HC05B6
Rev. 4.1

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