MC68HC711D3CFN2 Freescale Semiconductor, MC68HC711D3CFN2 Datasheet - Page 75

IC MCU 2MHZ 4K OTP 44-PLCC

MC68HC711D3CFN2

Manufacturer Part Number
MC68HC711D3CFN2
Description
IC MCU 2MHZ 4K OTP 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711D3CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
26
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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TECHNICAL DATA
The prescale bits, SCP[1:0], determine the highest baud rate and the SCR[2:0] bits se-
lect an additional binary submultiple ( 1
rate. The result of these two dividers in series is the 16 X receiver baud rate clock. The
SCR[2:0] bits are not affected by reset and can be changed at any time, although they
should not be changed when any SCI transfer is in progress.
Figure 7-3 illustrates the SCI baud rate timing chain. The prescale select bits deter-
mine the highest baud rate. The rate select bits determine additional divide by two
stages to arrive at the receiver timing (RT) clock rate. The baud rate clock is the result
of dividing the RT clock by 16.
SCR[2:0]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Freescale Semiconductor, Inc.
For More Information On This Product,
SERIAL COMMUNICATIONS INTERFACE
Prescaler
Divide
Table 7-2 Baud Rate Selects
128
By
16
32
64
1
2
4
8
Go to: www.freescale.com
(Prescaler Output from Previous Table)
4800
4800
2400
1200
600
300
150
2, 4 through 128) of this highest baud
Highest Baud Rate
9600
9600
4800
2400
1200
600
300
150
38.4 K
38.4 K
19.2 K
9600
4800
2400
1200
600
300
7-9

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