MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 10

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOT
Quantity:
2 600
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOTOROLA
Quantity:
2 337
Part Number:
MC68HC11E1CFN3
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC11E1CFN3
Manufacturer:
ST
0
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Table of Contents
Data Sheet
10
5.5
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
5.5.6
5.6
5.6.1
5.6.2
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
7.1
7.2
7.3
7.4
7.5
7.5.1
7.5.2
7.6
7.7
7.7.1
7.7.2
7.7.3
7.7.4
7.7.5
7.8
7.9
Freescale Semiconductor, Inc.
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Low-Power Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Port E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Handshake Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Parallel I/O Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Transmit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Receive Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Wakeup Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
SCI Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
SCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Status Flags and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Receiver Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
For More Information On This Product,
Interrupt Recognition and Register Stacking . . . . . . . . . . . . . . . . . 100
Non-Maskable Interrupt Request (XIRQ) . . . . . . . . . . . . . . . . . . . . 100
Illegal Opcode Trap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Software Interrupt (SWI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Maskable Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Reset and Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Idle-Line Wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Address-Mark Wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Serial Communications Data Register . . . . . . . . . . . . . . . . . . . . . . 122
Serial Communications Control Register 1. . . . . . . . . . . . . . . . . . . 123
Serial Communications Control Register 2. . . . . . . . . . . . . . . . . . . 124
Serial Communication Status Register . . . . . . . . . . . . . . . . . . . . . . 125
Baud Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Section 7. Serial Communications Interface (SCI)
Section 6. Parallel Input/Output (I/O) Ports
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Table of Contents
M68HC11E Family — Rev. 5
MOTOROLA

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