MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 27

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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1.4.7.1 V
1.4.8 STRA/AS
1.4.9 STRB/R/W
M68HC11E Family — Rev. 5
MOTOROLA
RL
and V
RH
The V
When the voltage on this pin is more than one MOS threshold (about 0.7 volts)
above the V
from this signal rather than the V
without V
removed and must remain low until V
These two inputs provide the reference voltages for the analog-to-digital (A/D)
converter circuitry:
For proper A/D converter operation:
The strobe A (STRA) and address strobe (AS) pin performs either of two separate
functions, depending on the operating mode:
AS can be used to demultiplex the address and data signals at port C. Refer to
Section 2. Operating Modes and On-Chip
The strobe B (STRB) and read/write (R/W) pin act as either an output strobe or as
a data bus direction indicator, depending on the operating mode.
In single-chip operating mode, STRB acts as a programmable strobe for
handshake with other parallel devices. Refer to
(I/O) Ports
In expanded multiplexed operating mode, R/W is used to indicate the direction of
transfers on the external data bus. A low on the R/W pin indicates data is being
written to the external data bus. A high on this pin indicates that a read cycle is in
progress. R/W stays low during consecutive data bus write cycles, such as a
double-byte store. It is possible for data to be driven out of port C, if internal read
visibility (IRV) is enabled and an internal address is read, even though R/W is in a
high-impedance state. Refer to
Memory
STBY
V
V
V
V
In single-chip mode, STRA performs an input handshake (strobe input)
function.
In the expanded multiplexed mode, AS provides an address strobe function.
Freescale Semiconductor, Inc.
RL
RH
RH
RL
For More Information On This Product,
DD
for more information about IRVNE (internal read visibility not E).
is the low reference, typically 0 Vdc.
and V
pin is used to input random-access memory (RAM) standby power.
is the high reference.
should be at least 3 Vdc greater than V
for further information.
DD
power applied to the MCU. Reset must be driven low before V
voltage, the internal RAM and part of the reset logic are powered
RH
Go to: www.freescale.com
should be between V
General Description
Section 2. Operating Modes and On-Chip
DD
input. This allows RAM contents to be retained
DD
has been restored to a valid level.
SS
and V
Memory.
Section 6. Parallel Input/Output
DD
RL
.
.
General Description
Pin Descriptions
Data Sheet
DD
is
27

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