MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 43

• Manufacturer Part Number: MC68HC11E1CFN3
• Description: IC MCU 3MHZ 512 EEPROM 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E1CFN3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

M68HC11E Family — Rev. 5
MOTOROLA
1. MC68HC711E20 only
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes.
2. MC68HC711E9 only
3. MC68HC811E2 only
$103A
$103B
$103C
$103D
$103E
$1036
$1037
$1038
$1039
Addr.
$103F
$103F
Highest Priority I Bit Interrupt and
Miscellaneous Register (HPRIO)
Arm/Reset COP Timer Circuitry
RAM and I/O Mapping Register
System Configuration Register
System Configuration Register
Programming Control Register
EPROM Programming Control
System Configuration Options
Register Name
(PPROG)
EPROM and EEPROM
Register (EPROG)
Register (COPRST)
Register (OPTION)
Figure 2-7. Register and Control Bit Assignments (Sheet 6 of 6)
See page 59.
See page 51.
See page 91.
See page 54.
See page 46.
See page 50.
See page 48.
See page 48.
(CONFIG)
(CONFIG)
Reserved
Reserved
Reserved
(INIT)
(1)
(3)
Freescale Semiconductor, Inc.
For More Information On This Product,
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Operating Modes and On-Chip Memory
I = Indeterminate after reset
RBOOT
ADPU
RAM3
Bit 7
Bit 7
MBE
ODD
EE3
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R
R
R
0
0
0
0
0
0
0
1
= Unimplemented
SMOD
EVEN
RAM2
CSEL
Bit 6
EE2
R
R
R
6
0
0
0
0
0
0
0
1
ELAT
IRQE
RAM1
ELAT
Bit 5
MDA
EE1
R
R
R
5
0
0
0
0
0
0
0
1
(2)
(1)
IRV(NE)
EXCOL
DLY
RAM0
BYTE
Bit 4
EE0
R
R
R
R
0
1
0
0
0
0
0
1
4
(1)
Operating Modes and On-Chip Memory
= Reserved
EXROW
NOSEC
NOSEC
PSEL3
REG3
ROW
Bit 3
CME
R
R
R
U
U
3
0
0
0
0
0
0
NOCOP
NOCOP
ERASE
PSEL2
REG2
U = Unaffected
Bit 2
T1
R
R
R
U
U
2
0
0
0
0
1
0
ROMON
EELAT
PSEL1
CR1
REG1
Bit 1
T0
R
R
R
1
0
0
0
0
1
0
1
1
Memory Map
(1)
Data Sheet
PSEL0
CR0
EPGM
REG0
EEON
EEON
Bit 0
PGM
Bit 0
R
R
R
U
0
0
0
0
0
1
1
(1)
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