MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 46

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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Operating Modes and On-Chip Memory
Data Sheet
46
A normal mode is selected when MODB is logic 1 during reset. One of three reset
vectors is fetched from address $FFFA–$FFFF, and program execution begins
from the address indicated by this vector. If MODB is logic 0 during reset, the
special mode reset vector is fetched from addresses $BFFA–$BFFF, and software
has access to special test features. Refer to
RBOOT — Read Bootstrap ROM Bit
SMOD and MDA — Special Mode Select and Mode Select A Bits
Resets:
1. The reset values depend on the mode selected at the RESET pin rising edge.
Single chip:
Expanded:
Bootstrap:
Valid only when SMOD is set (bootstrap or special test mode); can be written
only in special modes
The initial value of SMOD is the inverse of the logic level present on the MODB
pin at the rising edge of reset. The initial value of MDA equals the logic level
present on the MODA pin at the rising edge of reset. These two bits can be read
at any time. They can be written anytime in special modes. MDA can be written
only once in normal modes. SMOD cannot be set once it has been cleared.
Address:
Read:
Write:
Test:
0 = Bootloader ROM disabled and not in map
1 = Bootloader ROM enabled and in map at $BE00–$BFFF
Freescale Semiconductor, Inc.
Figure 2-9. Highest Priority I-Bit Interrupt and Miscellaneous
For More Information On This Product,
RBOOT
$103C
Bit 7
MODB
Operating Modes and On-Chip Memory
0
0
1
0
1
1
0
0
(1)
Go to: www.freescale.com
Input
SMOD
MODA
6
0
0
1
1
0
1
0
1
(1)
MDA
Register (HPRIO)
5
0
1
0
1
(1)
Special test
Single chip
Expanded
Bootstrap
IRV(NE)
Mode
4
0
0
0
1
(1)
Section 5. Resets and
PSEL3
3
0
0
0
0
Latched at Reset
SMOD
0
0
1
1
PSEL2
M68HC11E Family — Rev. 5
2
1
1
1
1
MDA
0
1
0
1
PSEL1
1
1
1
1
1
Interrupts.
MOTOROLA
PSEL0
Bit 0
0
0
0
0

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