MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 76

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOT
Quantity:
2 600
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOTOROLA
Quantity:
2 337
Part Number:
MC68HC11E1CFN3
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC11E1CFN3
Manufacturer:
ST
0
Part Number:
MC68HC11E1CFN3
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Central Processor Unit (CPU)
4.2.5 Program Counter (PC)
Data Sheet
76
JSR, JUMP TO SUBROUTINE
INDEXED, X
BSR, BRANCH TO SUBROUTINE
RTS, RETURN FROM
SUBROUTINE
INDEXED, Y
INDEXED, Y
DIRECT
PC
PC
MAIN PROGRAM
MAIN PROGRAM
$8D = BSR
RTN
RTN
RTN
RTN
$39 = RTS
PC
PC
PC
PC
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
$BD = PRE
$AD = JSR
$AD = JSR
$9D = JSR
$18 = PRE
The program counter, a 16-bit register, contains the address of the next instruction
to be executed. After reset, the program counter is initialized from one of six
possible vectors, depending on operating mode and the cause of reset. See
Table
dd
hh
ff
ff
ll
Test or Boot
SP–2
SP–1
SP+1
SP+2
Normal
4-1.
Freescale Semiconductor, Inc.
Mode
SP
SP
For More Information On This Product,
7
7
Figure 4-2. Stacking Operations
SP–2
SP–1
STACK
STACK
SP
RTN
RTN
RTN
RTN
7
H
H
L
L
Go to: www.freescale.com
Central Processor Unit (CPU)
POR or RESET Pin
STACK
RTN
RTN
0
0
Table 4-1. Reset Vector Comparison
H
L
$BFFE, F
$FFFE, F
0
LEGEND:
RTN
RTN
RTN = ADDRESS OF NEXT INSTRUCTION IN MAIN PROGRAM TO
RTI, RETURN FROM INTERRUPT
SWI, SOFTWARE INTERRUPT
WAI, WAIT FOR INTERRUPT
dd = 8-BIT DIRECT ADDRESS ($0000–$00FF) (HIGH BYTE ASSUMED
hh = HIGH-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
H
ff = 8-BIT POSITIVE OFFSET $00 (0) TO $FF (255) IS ADDED TO INDEX
L
ll = LOW-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
rr= SIGNED RELATIVE OFFSET $80 (–128) TO $7F (+127) (OFFSET
= MOST SIGNIFICANT BYTE OF RETURN ADDRESS
= LEAST SIGNIFICANT BYTE OF RETURN ADDRESS
= STACK POINTER POSITION AFTER OPERATION IS COMPLETE
PC
PC
PC
BE EXECUTED UPON RETURN FROM SUBROUTINE
TO BE $00)
RELATIVE TO THE ADDRESS FOLLOWING THE MACHINE CODE
OFFSET BYTE)
INTERRUPT ROUTINE
MAIN PROGRAM
MAIN PROGRAM
$3E = WAI
$3F = SWI
Clock Monitor
$3B = RTI
$BFFC, D
$FFFC, D
SP+1
SP+2
SP+3
SP+4
SP+5
SP+6
SP+7
SP+8
SP+9
SP–9
SP–8
SP–7
SP–6
SP–5
SP–4
SP–3
SP–2
SP–1
M68HC11E Family — Rev. 5
SP
SP
7
7
COP Watchdog
$FFFA, B
$BFFA, B
STACK
STACK
ACCB
ACCA
RTN
ACCB
ACCA
RTN
RTN
RTN
CCR
CCR
IX
IY
IX
IY
IX
IY
IX
IY
H
H
H
H
L
L
L
L
H
H
L
L
MOTOROLA
0
0

Related parts for MC68HC11E1CFN3