MC68HC11E1CFN2 Freescale Semiconductor, MC68HC11E1CFN2 Datasheet - Page 33

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MC68HC11E1CFN2

Manufacturer Part Number
MC68HC11E1CFN2
Description
IC MCU 512 EEPROM 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

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2.1 Introduction
2.2 Operating Modes
2.2.1 Single-Chip Mode
2.2.2 Expanded Mode
M68HC11E Family — Rev. 5
MOTOROLA
Data Sheet — M68HC11E Family
NOTE:
This section contains information about the operating modes and the on-chip
memory for M68HC11 E-series MCUs. Except for a few minor differences,
operation is identical for all devices in the E series. Differences are noted where
necessary.
The values of the mode select inputs MODB and MODA during reset determine the
operating mode. Single-chip and expanded multiplexed are the normal modes.
Each of the two normal modes is paired with a special mode:
In single-chip mode, ports B and C and strobe pins A (STRA) and B (STRB) are
available for general-purpose parallel input/output (I/O). In this mode, all software
needed to control the MCU is contained in internal resources. If present, read-only
memory (ROM) and/or erasable, programmable read-only memory (EPROM) will
always be enabled out of reset, ensuring that the reset and interrupt vectors will be
available at locations $FFC0–$FFFF.
For the MC68HC811E2, the vector locations are the same; however, they are
contained in the 2048-byte EEPROM array.
In expanded operating mode, the MCU can access the full 64-Kbyte address
space. The space includes:
In single-chip mode only on-chip memory is available.
Expanded mode, however, allows access to external memory.
Bootstrap, a variation of the single-chip mode, is a special mode that
executes a bootloader program in an internal bootstrap ROM.
Test is a special mode that allows privileged access to internal resources.
The same on-chip memory addresses used for single-chip mode
Addresses for external peripherals and memory devices
Freescale Semiconductor, Inc.
For More Information On This Product,
Section 2. Operating Modes and On-Chip Memory
Operating Modes and On-Chip Memory
Go to: www.freescale.com
Data Sheet
33

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